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Commit 938b2b14 authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer Committed by Ralf Baechle
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[MIPS] Malta: Fix build errors for 64-bit kernels 



Fix 64-bit Malta by using CKSEG0ADDR and correct casts.

Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 1f34f2e4

arch/mips/mips-boards/generic/amon.c

+2 −2
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ 


int amon_cpu_avail(int cpu)

{

	struct cpulaunch *launch = (struct cpulaunch *)KSEG0ADDR(CPULAUNCH);

	struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH);



	if (cpu < 0 || cpu >= NCPULAUNCH) {

		pr_debug("avail: cpu%d is out of range\n", cpu);
@@ -53,7 +53,7 @@ void amon_cpu_start(int cpu, 
		    unsigned long gp, unsigned long a0)

{

	volatile struct cpulaunch *launch =

		(struct cpulaunch  *)KSEG0ADDR(CPULAUNCH);

		(struct cpulaunch  *)CKSEG0ADDR(CPULAUNCH);



	if (!amon_cpu_avail(cpu))

		return;

include/asm-mips/gic.h

+2 −2
Original line number Diff line number Diff line
@@ -24,8 +24,8 @@ 


#define MSK(n) ((1 << (n)) - 1)

#define REG32(addr)		(*(volatile unsigned int *) (addr))

#define REG(base, offs)		REG32((unsigned int)(base) + offs##_##OFS)

#define REGP(base, phys)	REG32((unsigned int)(base) + (phys))

#define REG(base, offs)		REG32((unsigned long)(base) + offs##_##OFS)

#define REGP(base, phys)	REG32((unsigned long)(base) + (phys))



/* Accessors */

#define GIC_REG(segment, offset) \