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Commit 930beb5a authored by Florian Fainelli's avatar Florian Fainelli Committed by Ralf Baechle
Browse files

MIPS: introduce MIPS_L1_CACHE_SHIFT_<N> 



In order to avoid keeping an ever growing list of chips which need to
select a specific MIPS_L1_CACHE_SHIFT value introduce multiple internal
and non-exposed Kconfig symbols for the various MIPS_L1_CACHE_SHIFT
values out there and update the relevant Kconfig symbols to select them.

Signed-off-by: default avatarFlorian Fainelli <florian@openwrt.org>
parent dc4d7b37

arch/mips/Kconfig

+19 −0
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ config MACH_DECSTATION 
	select SYS_SUPPORTS_128HZ

	select SYS_SUPPORTS_256HZ

	select SYS_SUPPORTS_1024HZ

	select MIPS_L1_CACHE_SHIFT_4

	help

	  This enables support for DEC's MIPS based workstations.  For details

	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
@@ -467,6 +468,7 @@ config SGI_IP22 
	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_64BIT_KERNEL

	select SYS_SUPPORTS_BIG_ENDIAN

	select MIPS_L1_CACHE_SHIFT_7

	help

	  This are the SGI Indy, Challenge S and Indigo2, as well as certain

	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
@@ -487,6 +489,7 @@ config SGI_IP27 
	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_NUMA

	select SYS_SUPPORTS_SMP

	select MIPS_L1_CACHE_SHIFT_7

	help

	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics

	  workstations.  To compile a Linux kernel that runs on these, say Y
@@ -693,6 +696,7 @@ config MIKROTIK_RB532 
	select SWAP_IO_SPACE

	select BOOT_RAW

	select ARCH_REQUIRE_GPIOLIB

	select MIPS_L1_CACHE_SHIFT_4

	help

	  Support the Mikrotik(tm) RouterBoard 532 series,

	  based on the IDT RC32434 SoC.
@@ -1092,6 +1096,18 @@ config FW_SNIPROM 
config BOOT_ELF32

	bool



config MIPS_L1_CACHE_SHIFT_4

	bool



config MIPS_L1_CACHE_SHIFT_5

	bool



config MIPS_L1_CACHE_SHIFT_6

	bool



config MIPS_L1_CACHE_SHIFT_7

	bool



config MIPS_L1_CACHE_SHIFT

	int

	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL || SOC_RT288X
@@ -1376,6 +1392,8 @@ config CPU_CAVIUM_OCTEON 
	select LIBFDT

	select USE_OF

	select USB_EHCI_BIG_ENDIAN_MMIO

	select SYS_HAS_DMA_OPS

	select MIPS_L1_CACHE_SHIFT_7

	help

	  The Cavium Octeon processor is a highly integrated chip containing

	  many ethernet hardware widgets for networking tasks. The processor
@@ -1798,6 +1816,7 @@ config IP22_CPU_SCACHE 
config MIPS_CPU_SCACHE

	bool

	select BOARD_SCACHE

	select MIPS_L1_CACHE_SHIFT_6



config R5000_CPU_SCACHE

	bool

arch/mips/pmcs-msp71xx/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ config PMC_MSP4200_EVAL 
	bool "PMC-Sierra MSP4200 Eval Board"

	select IRQ_MSP_SLP

	select HW_HAS_PCI

	select MIPS_L1_CACHE_SHIFT_4



config PMC_MSP4200_GW

	bool "PMC-Sierra MSP4200 VoIP Gateway"

arch/mips/ralink/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ choice 


	config SOC_RT288X

		bool "RT288x"

		select MIPS_L1_CACHE_SHIFT_4



	config SOC_RT305X

		bool "RT305x"