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Commit 9247eca7 authored by Olivier Moysan's avatar Olivier Moysan Committed by Greg Kroah-Hartman
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ASoC: stm32: i2s: fix dma configuration 



commit 1ac2bd16448997d9ec01922423486e1e85535eda upstream.

DMA configuration is not balanced on start/stop.
Move DMA configuration to trigger callback.

Signed-off-by: default avatarOlivier Moysan <olivier.moysan@st.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 1ff5ee14

sound/soc/stm/stm32_i2s.c

+7 −7
Original line number Original line Diff line number Diff line
@@ -488,7 +488,7 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai, 
{

{

	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);

	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);

	int format = params_width(params);

	int format = params_width(params);

	u32 cfgr, cfgr_mask, cfg1, cfg1_mask;

	u32 cfgr, cfgr_mask, cfg1;

	unsigned int fthlv;

	unsigned int fthlv;

	int ret;

	int ret;
@@ -529,15 +529,11 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai, 
	if (ret < 0)

	if (ret < 0)

		return ret;

		return ret;





	cfg1 = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN;

	cfg1_mask = cfg1;



	fthlv = STM32_I2S_FIFO_SIZE * I2S_FIFO_TH_ONE_QUARTER / 4;

	fthlv = STM32_I2S_FIFO_SIZE * I2S_FIFO_TH_ONE_QUARTER / 4;

	cfg1 |= I2S_CFG1_FTHVL_SET(fthlv - 1);

	cfg1 = I2S_CFG1_FTHVL_SET(fthlv - 1);

	cfg1_mask |= I2S_CFG1_FTHVL_MASK;





	return regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,

	return regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,

				  cfg1_mask, cfg1);

				  I2S_CFG1_FTHVL_MASK, cfg1);

}

}





static int stm32_i2s_startup(struct snd_pcm_substream *substream,

static int stm32_i2s_startup(struct snd_pcm_substream *substream,
@@ -589,6 +585,10 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd, 
		/* Enable i2s */

		/* Enable i2s */

		dev_dbg(cpu_dai->dev, "start I2S\n");

		dev_dbg(cpu_dai->dev, "start I2S\n");





		cfg1_mask = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN;

		regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,

				   cfg1_mask, cfg1_mask);



		ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG,

		ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG,

					 I2S_CR1_SPE, I2S_CR1_SPE);

					 I2S_CR1_SPE, I2S_CR1_SPE);

		if (ret < 0) {

		if (ret < 0) {