Loading drivers/gpu/drm/nouveau/include/nvif/cl0080.h 0 → 100644 +45 −0 Original line number Diff line number Diff line #ifndef __NVIF_CL0080_H__ #define __NVIF_CL0080_H__ struct nv_device_v0 { __u8 version; __u8 pad01[7]; __u64 device; /* device identifier, ~0 for client default */ }; #define NV_DEVICE_V0_INFO 0x00 #define NV_DEVICE_V0_TIME 0x01 struct nv_device_info_v0 { __u8 version; #define NV_DEVICE_INFO_V0_IGP 0x00 #define NV_DEVICE_INFO_V0_PCI 0x01 #define NV_DEVICE_INFO_V0_AGP 0x02 #define NV_DEVICE_INFO_V0_PCIE 0x03 #define NV_DEVICE_INFO_V0_SOC 0x04 __u8 platform; __u16 chipset; /* from NV_PMC_BOOT_0 */ __u8 revision; /* from NV_PMC_BOOT_0 */ #define NV_DEVICE_INFO_V0_TNT 0x01 #define NV_DEVICE_INFO_V0_CELSIUS 0x02 #define NV_DEVICE_INFO_V0_KELVIN 0x03 #define NV_DEVICE_INFO_V0_RANKINE 0x04 #define NV_DEVICE_INFO_V0_CURIE 0x05 #define NV_DEVICE_INFO_V0_TESLA 0x06 #define NV_DEVICE_INFO_V0_FERMI 0x07 #define NV_DEVICE_INFO_V0_KEPLER 0x08 #define NV_DEVICE_INFO_V0_MAXWELL 0x09 __u8 family; __u8 pad06[2]; __u64 ram_size; __u64 ram_user; char chip[16]; char name[64]; }; struct nv_device_time_v0 { __u8 version; __u8 pad01[7]; __u64 time; }; #endif drivers/gpu/drm/nouveau/include/nvif/class.h +1 −48 Original line number Diff line number Diff line Loading @@ -11,7 +11,7 @@ #define NVIF_CLASS_SW_GF100 /* if0005.h */ -7 /* the below match nvidia-assigned (either in hw, or sw) class numbers */ #define NV_DEVICE 0x00000080 #define NV_DEVICE /* cl0080.h */ 0x00000080 #define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x00000002 #define NV_DMA_TO_MEMORY /* cl0002.h */ 0x00000003 Loading Loading @@ -151,51 +151,4 @@ struct nv_client_devlist_v0 { __u8 pad02[6]; __u64 device[]; }; /******************************************************************************* * device ******************************************************************************/ struct nv_device_v0 { __u8 version; __u8 pad01[7]; __u64 device; /* device identifier, ~0 for client default */ }; #define NV_DEVICE_V0_INFO 0x00 #define NV_DEVICE_V0_TIME 0x01 struct nv_device_info_v0 { __u8 version; #define NV_DEVICE_INFO_V0_IGP 0x00 #define NV_DEVICE_INFO_V0_PCI 0x01 #define NV_DEVICE_INFO_V0_AGP 0x02 #define NV_DEVICE_INFO_V0_PCIE 0x03 #define NV_DEVICE_INFO_V0_SOC 0x04 __u8 platform; __u16 chipset; /* from NV_PMC_BOOT_0 */ __u8 revision; /* from NV_PMC_BOOT_0 */ #define NV_DEVICE_INFO_V0_TNT 0x01 #define NV_DEVICE_INFO_V0_CELSIUS 0x02 #define NV_DEVICE_INFO_V0_KELVIN 0x03 #define NV_DEVICE_INFO_V0_RANKINE 0x04 #define NV_DEVICE_INFO_V0_CURIE 0x05 #define NV_DEVICE_INFO_V0_TESLA 0x06 #define NV_DEVICE_INFO_V0_FERMI 0x07 #define NV_DEVICE_INFO_V0_KEPLER 0x08 #define NV_DEVICE_INFO_V0_MAXWELL 0x09 __u8 family; __u8 pad06[2]; __u64 ram_size; __u64 ram_user; char chip[16]; char name[64]; }; struct nv_device_time_v0 { __u8 version; __u8 pad01[7]; __u64 time; }; #endif drivers/gpu/drm/nouveau/include/nvif/device.h +1 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ #define __NVIF_DEVICE_H__ #include <nvif/object.h> #include <nvif/class.h> #include <nvif/cl0080.h> struct nvif_device { struct nvif_object object; Loading drivers/gpu/drm/nouveau/nouveau_connector.c +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ #include "nouveau_encoder.h" #include "nouveau_crtc.h" #include <nvif/class.h> #include <nvif/cl0046.h> #include <nvif/event.h> Loading drivers/gpu/drm/nouveau/nouveau_drm.c +1 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,7 @@ #include <core/pci.h> #include <core/tegra.h> #include <nvif/class.h> #include <nvif/cl0002.h> #include <nvif/cla06f.h> #include <nvif/if0004.h> Loading Loading
drivers/gpu/drm/nouveau/include/nvif/cl0080.h 0 → 100644 +45 −0 Original line number Diff line number Diff line #ifndef __NVIF_CL0080_H__ #define __NVIF_CL0080_H__ struct nv_device_v0 { __u8 version; __u8 pad01[7]; __u64 device; /* device identifier, ~0 for client default */ }; #define NV_DEVICE_V0_INFO 0x00 #define NV_DEVICE_V0_TIME 0x01 struct nv_device_info_v0 { __u8 version; #define NV_DEVICE_INFO_V0_IGP 0x00 #define NV_DEVICE_INFO_V0_PCI 0x01 #define NV_DEVICE_INFO_V0_AGP 0x02 #define NV_DEVICE_INFO_V0_PCIE 0x03 #define NV_DEVICE_INFO_V0_SOC 0x04 __u8 platform; __u16 chipset; /* from NV_PMC_BOOT_0 */ __u8 revision; /* from NV_PMC_BOOT_0 */ #define NV_DEVICE_INFO_V0_TNT 0x01 #define NV_DEVICE_INFO_V0_CELSIUS 0x02 #define NV_DEVICE_INFO_V0_KELVIN 0x03 #define NV_DEVICE_INFO_V0_RANKINE 0x04 #define NV_DEVICE_INFO_V0_CURIE 0x05 #define NV_DEVICE_INFO_V0_TESLA 0x06 #define NV_DEVICE_INFO_V0_FERMI 0x07 #define NV_DEVICE_INFO_V0_KEPLER 0x08 #define NV_DEVICE_INFO_V0_MAXWELL 0x09 __u8 family; __u8 pad06[2]; __u64 ram_size; __u64 ram_user; char chip[16]; char name[64]; }; struct nv_device_time_v0 { __u8 version; __u8 pad01[7]; __u64 time; }; #endif
drivers/gpu/drm/nouveau/include/nvif/class.h +1 −48 Original line number Diff line number Diff line Loading @@ -11,7 +11,7 @@ #define NVIF_CLASS_SW_GF100 /* if0005.h */ -7 /* the below match nvidia-assigned (either in hw, or sw) class numbers */ #define NV_DEVICE 0x00000080 #define NV_DEVICE /* cl0080.h */ 0x00000080 #define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x00000002 #define NV_DMA_TO_MEMORY /* cl0002.h */ 0x00000003 Loading Loading @@ -151,51 +151,4 @@ struct nv_client_devlist_v0 { __u8 pad02[6]; __u64 device[]; }; /******************************************************************************* * device ******************************************************************************/ struct nv_device_v0 { __u8 version; __u8 pad01[7]; __u64 device; /* device identifier, ~0 for client default */ }; #define NV_DEVICE_V0_INFO 0x00 #define NV_DEVICE_V0_TIME 0x01 struct nv_device_info_v0 { __u8 version; #define NV_DEVICE_INFO_V0_IGP 0x00 #define NV_DEVICE_INFO_V0_PCI 0x01 #define NV_DEVICE_INFO_V0_AGP 0x02 #define NV_DEVICE_INFO_V0_PCIE 0x03 #define NV_DEVICE_INFO_V0_SOC 0x04 __u8 platform; __u16 chipset; /* from NV_PMC_BOOT_0 */ __u8 revision; /* from NV_PMC_BOOT_0 */ #define NV_DEVICE_INFO_V0_TNT 0x01 #define NV_DEVICE_INFO_V0_CELSIUS 0x02 #define NV_DEVICE_INFO_V0_KELVIN 0x03 #define NV_DEVICE_INFO_V0_RANKINE 0x04 #define NV_DEVICE_INFO_V0_CURIE 0x05 #define NV_DEVICE_INFO_V0_TESLA 0x06 #define NV_DEVICE_INFO_V0_FERMI 0x07 #define NV_DEVICE_INFO_V0_KEPLER 0x08 #define NV_DEVICE_INFO_V0_MAXWELL 0x09 __u8 family; __u8 pad06[2]; __u64 ram_size; __u64 ram_user; char chip[16]; char name[64]; }; struct nv_device_time_v0 { __u8 version; __u8 pad01[7]; __u64 time; }; #endif
drivers/gpu/drm/nouveau/include/nvif/device.h +1 −1 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ #define __NVIF_DEVICE_H__ #include <nvif/object.h> #include <nvif/class.h> #include <nvif/cl0080.h> struct nvif_device { struct nvif_object object; Loading
drivers/gpu/drm/nouveau/nouveau_connector.c +1 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ #include "nouveau_encoder.h" #include "nouveau_crtc.h" #include <nvif/class.h> #include <nvif/cl0046.h> #include <nvif/event.h> Loading
drivers/gpu/drm/nouveau/nouveau_drm.c +1 −0 Original line number Diff line number Diff line Loading @@ -37,6 +37,7 @@ #include <core/pci.h> #include <core/tegra.h> #include <nvif/class.h> #include <nvif/cl0002.h> #include <nvif/cla06f.h> #include <nvif/if0004.h> Loading