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Commit 91d17dc3 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-renesas-for-v4.9-tag1' of... 

Merge tag 'clk-renesas-for-v4.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Merge r8a7796 watchdog clk support from Geert Uytterhoeven:

Add all clocks related to the Watchdog Timer (WDT) controller on the
Renesas R-Car M3-W (r8a7796) SoC.

* tag 'clk-renesas-for-v4.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r8a7796: Add watchdog module clock
  clk: renesas: r8a7796: Add watchdog core clocks
parents f6475e29 b51d5275

drivers/clk/renesas/r8a7796-cpg-mssr.c

+7 −0
Original line number Original line Diff line number Diff line
@@ -45,6 +45,7 @@ enum clk_ids { 
	CLK_S3,

	CLK_S3,

	CLK_SDSRC,

	CLK_SDSRC,

	CLK_SSPSRC,

	CLK_SSPSRC,

	CLK_RINT,





	/* Module Clocks */

	/* Module Clocks */

	MOD_CLK_BASE

	MOD_CLK_BASE
@@ -94,10 +95,16 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { 




	DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),

	DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),

	DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),

	DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),



	DEF_DIV6_RO("osc",      R8A7796_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),

	DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),



	DEF_BASE("r",           R8A7796_CLK_R,     CLK_TYPE_GEN3_R, CLK_RINT),

};

};





static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {

static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {

	DEF_MOD("scif2",		 310,	R8A7796_CLK_S3D4),

	DEF_MOD("scif2",		 310,	R8A7796_CLK_S3D4),

	DEF_MOD("rwdt0",		 402,	R8A7796_CLK_R),

	DEF_MOD("intc-ap",		 408,	R8A7796_CLK_S3D1),

	DEF_MOD("intc-ap",		 408,	R8A7796_CLK_S3D1),

};

};