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Commit 90ebc483 authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Greg Kroah-Hartman
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serial: imx: repair and complete handshaking 



The .get_mctrl callback should not report the status of RTS or LOOP, so
drop this. Instead implement reporting the state of CAR (aka DCD) and
RI.

For .set_mctrl implement setting the DTR line.

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 18dfef9c

drivers/tty/serial/imx.c

+17 −6
Original line number Original line Diff line number Diff line
@@ -148,8 +148,11 @@ 
#define USR2_TXFE	 (1<<14) /* Transmit buffer FIFO empty */

#define USR2_TXFE	 (1<<14) /* Transmit buffer FIFO empty */

#define USR2_DTRF	 (1<<13) /* DTR edge interrupt flag */

#define USR2_DTRF	 (1<<13) /* DTR edge interrupt flag */

#define USR2_IDLE	 (1<<12) /* Idle condition */

#define USR2_IDLE	 (1<<12) /* Idle condition */

#define USR2_RIDELT	 (1<<10) /* Ring Interrupt Delta */

#define USR2_RIIN	 (1<<9)	 /* Ring Indicator Input */

#define USR2_IRINT	 (1<<8)	 /* Serial infrared interrupt flag */

#define USR2_IRINT	 (1<<8)	 /* Serial infrared interrupt flag */

#define USR2_WAKE	 (1<<7)	 /* Wake */

#define USR2_WAKE	 (1<<7)	 /* Wake */

#define USR2_DCDIN	 (1<<5)	 /* Data Carrier Detect Input */

#define USR2_RTSF	 (1<<4)	 /* RTS edge interrupt flag */

#define USR2_RTSF	 (1<<4)	 /* RTS edge interrupt flag */

#define USR2_TXDC	 (1<<3)	 /* Transmitter complete */

#define USR2_TXDC	 (1<<3)	 /* Transmitter complete */

#define USR2_BRCD	 (1<<2)	 /* Break condition */

#define USR2_BRCD	 (1<<2)	 /* Break condition */
@@ -804,16 +807,19 @@ static unsigned int imx_tx_empty(struct uart_port *port) 
static unsigned int imx_get_mctrl(struct uart_port *port)

static unsigned int imx_get_mctrl(struct uart_port *port)

{

{

	struct imx_port *sport = (struct imx_port *)port;

	struct imx_port *sport = (struct imx_port *)port;

	unsigned int tmp = TIOCM_DSR | TIOCM_CAR;

	unsigned int tmp = TIOCM_DSR;

	unsigned usr1 = readl(sport->port.membase + USR1);





	if (readl(sport->port.membase + USR1) & USR1_RTSS)

	if (usr1 & USR1_RTSS)

		tmp |= TIOCM_CTS;

		tmp |= TIOCM_CTS;





	if (readl(sport->port.membase + UCR2) & UCR2_CTS)

	/* in DCE mode DCDIN is always 0 */

		tmp |= TIOCM_RTS;

	if (!(usr1 & USR2_DCDIN))

		tmp |= TIOCM_CAR;





	if (readl(sport->port.membase + uts_reg(sport)) & UTS_LOOP)

	/* in DCE mode RIIN is always 0 */

		tmp |= TIOCM_LOOP;

	if (readl(sport->port.membase + USR2) & USR2_RIIN)

		tmp |= TIOCM_RI;





	return tmp;

	return tmp;

}

}
@@ -831,6 +837,11 @@ static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) 
		writel(temp, sport->port.membase + UCR2);

		writel(temp, sport->port.membase + UCR2);

	}

	}





	temp = readl(sport->port.membase + UCR3) & ~UCR3_DSR;

	if (!(mctrl & TIOCM_DTR))

		temp |= UCR3_DSR;

	writel(temp, sport->port.membase + UCR3);



	temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP;

	temp = readl(sport->port.membase + uts_reg(sport)) & ~UTS_LOOP;

	if (mctrl & TIOCM_LOOP)

	if (mctrl & TIOCM_LOOP)

		temp |= UTS_LOOP;

		temp |= UTS_LOOP;