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Commit 90d4c5bb authored by Ganesh Goudar's avatar Ganesh Goudar Committed by David S. Miller
Browse files

cxgb4: fix endian to test F_FW_PORT_CMD_DCBXDIS32 



For FW_PORT_ACTION_GET_PORT_INFO32 messages, the
u.info32.lstatus32_to_cbllen32 is 32-bit Big Endian.
We need to translate that to CPU Endian in order to
test F_FW_PORT_CMD_DCBXDIS32.

Signed-off-by: default avatarCasey Leedom <leedom@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent cef238d7

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

+3 −4
Original line number Diff line number Diff line
@@ -554,10 +554,9 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp, 


			dev = q->adap->port[q->adap->chan_map[port]];

			dcbxdis = (action == FW_PORT_ACTION_GET_PORT_INFO

				   ? !!(pcmd->u.info.dcbxdis_pkd &

					FW_PORT_CMD_DCBXDIS_F)

				   : !!(pcmd->u.info32.lstatus32_to_cbllen32 &

					FW_PORT_CMD_DCBXDIS32_F));

			  ? !!(pcmd->u.info.dcbxdis_pkd & FW_PORT_CMD_DCBXDIS_F)

			  : !!(be32_to_cpu(pcmd->u.info32.lstatus32_to_cbllen32)

			       & FW_PORT_CMD_DCBXDIS32_F));

			state_input = (dcbxdis

				       ? CXGB4_DCB_INPUT_FW_DISABLED

				       : CXGB4_DCB_INPUT_FW_ENABLED);