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Commit 90870483 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'ixp4xx_fixes_for_3.7' of git://git.infradead.org/users/jcooper/linux into fixes 

From Jason Cooper <jason@lakedaemon.net>:

ixp4xx fixes for v3.7

* tag 'ixp4xx_fixes_for_3.7' of git://git.infradead.org/users/jcooper/linux

:
  IXP4xx: use __iomem for MMIO
  IXP4xx: map CPU config registers within VMALLOC region.
  IXP4xx: Always ioremap() Queue Manager MMIO region at boot.
  ixp4xx: Declare MODULE_FIRMWARE usage
  IXP4xx crypto: MOD_AES{128,192,256} already include key size.
  WAN: Remove redundant HDLC info printed by IXP4xx HSS driver.
  IXP4xx: Remove time limit for PCI TRDY to enable use of slow devices.
  IXP4xx: ixp4xx_crypto driver requires Queue Manager and NPE drivers.
  IXP4xx: HW pseudo-random generator is available on IXP45x/46x only.
  IXP4xx: Fix off-by-one bug in Goramo MultiLink platform.
  IXP4xx: Fix Goramo MultiLink platform compilation.

These were originally prepared by Krzysztof Halasa but not submitted
in time for v3.7 due to some confusion about how ixp4xx patches should
be handled. Jason thankfully offered to help out sending the patches
upstream through arm-soc now, but given the timing, I did not feel
comfortable sending them just before the 3.8 merge window.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 678a0990 0d2c9f05

arch/arm/mach-ixp4xx/common-pci.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void) 
		 * Enable the IO window to be way up high, at 0xfffffc00

		 * Enable the IO window to be way up high, at 0xfffffc00

		 */

		 */

		local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);

		local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);

		local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */

	} else {

	} else {

		printk("PCI: IXP4xx is target - No bus scan performed\n");

		printk("PCI: IXP4xx is target - No bus scan performed\n");

	}

	}

arch/arm/mach-ixp4xx/common.c

+5 −8
Original line number Original line Diff line number Diff line
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = { 
		.pfn		= __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),

		.pfn		= __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),

		.length		= IXP4XX_PCI_CFG_REGION_SIZE,

		.length		= IXP4XX_PCI_CFG_REGION_SIZE,

		.type		= MT_DEVICE

		.type		= MT_DEVICE

	},

	}, {	/* Queue Manager */

#ifdef CONFIG_DEBUG_LL

		.virtual	= (unsigned long)IXP4XX_QMGR_BASE_VIRT,

	{	/* Debug UART mapping */

		.pfn		= __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),

		.virtual	= (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT,

		.length		= IXP4XX_QMGR_REGION_SIZE,

		.pfn		= __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),

		.length		= IXP4XX_DEBUG_UART_REGION_SIZE,

		.type		= MT_DEVICE

		.type		= MT_DEVICE

	}

	},

#endif

};

};





void __init ixp4xx_map_io(void)

void __init ixp4xx_map_io(void)

arch/arm/mach-ixp4xx/goramo_mlr.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <asm/mach/arch.h>

#include <asm/mach/arch.h>

#include <asm/mach/flash.h>

#include <asm/mach/flash.h>

#include <asm/mach/pci.h>

#include <asm/mach/pci.h>

#include <asm/system_info.h>





#define SLOT_ETHA		0x0B	/* IDSEL = AD21 */

#define SLOT_ETHA		0x0B	/* IDSEL = AD21 */

#define SLOT_ETHB		0x0C	/* IDSEL = AD20 */

#define SLOT_ETHB		0x0C	/* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = { 
};

};









static struct platform_device *device_tab[6] __initdata = {

static struct platform_device *device_tab[7] __initdata = {

	&device_flash,		/* index 0 */

	&device_flash,		/* index 0 */

};

};

arch/arm/mach-ixp4xx/include/mach/debug-macro.S

+2 −2
Original line number Original line Diff line number Diff line
@@ -17,8 +17,8 @@ 
#else

#else

		mov	\rp, #0

		mov	\rp, #0

#endif

#endif

                orr     \rv, \rp, #0xff000000	@ virtual

		orr	\rv, \rp, #0xfe000000	@ virtual

		orr	\rv, \rv, #0x00b00000

		orr	\rv, \rv, #0x00f00000

                orr     \rp, \rp, #0xc8000000	@ physical

                orr     \rp, \rp, #0xc8000000	@ physical

                .endm

                .endm

arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h

+19 −27
Original line number Original line Diff line number Diff line
@@ -30,51 +30,43 @@ 
 *

 *

 * 0x50000000	0x10000000	ioremap'd	EXP BUS

 * 0x50000000	0x10000000	ioremap'd	EXP BUS

 *

 *

 * 0x6000000	0x00004000	ioremap'd	QMgr

 * 0xC8000000	0x00013000	0xFEF00000	On-Chip Peripherals

 *

 *

 * 0xC0000000	0x00001000	0xffbff000	PCI CFG

 * 0xC0000000	0x00001000	0xFEF13000	PCI CFG

 *

 *

 * 0xC4000000	0x00001000	0xffbfe000	EXP CFG

 * 0xC4000000	0x00001000	0xFEF14000	EXP CFG

 *

 *

 * 0xC8000000	0x00013000	0xffbeb000	On-Chip Peripherals

 * 0x60000000	0x00004000	0xFEF15000	QMgr

 */

 */





/*

/*

 * Queue Manager

 * Queue Manager

 */

 */

#define IXP4XX_QMGR_BASE_PHYS		(0x60000000)

#define IXP4XX_QMGR_BASE_PHYS		0x60000000

#define IXP4XX_QMGR_REGION_SIZE		(0x00004000)

#define IXP4XX_QMGR_BASE_VIRT		IOMEM(0xFEF15000)

#define IXP4XX_QMGR_REGION_SIZE		0x00004000





/*

/*

 * Expansion BUS Configuration registers

 * Peripheral space, including debug UART. Must be section-aligned so that

 * it can be used with the low-level debug code.

 */

 */

#define IXP4XX_EXP_CFG_BASE_PHYS	(0xC4000000)

#define IXP4XX_PERIPHERAL_BASE_PHYS	0xC8000000

#define IXP4XX_EXP_CFG_BASE_VIRT	IOMEM(0xFFBFE000)

#define IXP4XX_PERIPHERAL_BASE_VIRT	IOMEM(0xFEF00000)

#define IXP4XX_EXP_CFG_REGION_SIZE	(0x00001000)

#define IXP4XX_PERIPHERAL_REGION_SIZE	0x00013000





/*

/*

 * PCI Config registers

 * PCI Config registers

 */

 */

#define IXP4XX_PCI_CFG_BASE_PHYS	(0xC0000000)

#define IXP4XX_PCI_CFG_BASE_PHYS	0xC0000000

#define	IXP4XX_PCI_CFG_BASE_VIRT	IOMEM(0xFFBFF000)

#define IXP4XX_PCI_CFG_BASE_VIRT	IOMEM(0xFEF13000)

#define IXP4XX_PCI_CFG_REGION_SIZE	(0x00001000)

#define IXP4XX_PCI_CFG_REGION_SIZE	0x00001000



/*

 * Peripheral space

 */

#define IXP4XX_PERIPHERAL_BASE_PHYS	(0xC8000000)

#define IXP4XX_PERIPHERAL_BASE_VIRT	IOMEM(0xFFBEB000)

#define IXP4XX_PERIPHERAL_REGION_SIZE	(0x00013000)





/*

/*

 * Debug UART

 * Expansion BUS Configuration registers

 *

 * This is basically a remap of UART1 into a region that is section

 * aligned so that it * can be used with the low-level debug code.

 */

 */

#define	IXP4XX_DEBUG_UART_BASE_PHYS	(0xC8000000)

#define IXP4XX_EXP_CFG_BASE_PHYS	0xC4000000

#define	IXP4XX_DEBUG_UART_BASE_VIRT	IOMEM(0xffb00000)

#define IXP4XX_EXP_CFG_BASE_VIRT	0xFEF14000

#define	IXP4XX_DEBUG_UART_REGION_SIZE	(0x00001000)

#define IXP4XX_EXP_CFG_REGION_SIZE	0x00001000





#define IXP4XX_EXP_CS0_OFFSET	0x00

#define IXP4XX_EXP_CS0_OFFSET	0x00

#define IXP4XX_EXP_CS1_OFFSET   0x04

#define IXP4XX_EXP_CS1_OFFSET   0x04