Merge branch 'WIP.sched/core' into sched/core

   certain condition is true.  They must be used carefully to ensure

   there is no race condition.  You declare a

   <type>wait_queue_head_t</type>, and then processes which want to

   wait for that condition declare a <type>wait_queue_t</type>

   wait for that condition declare a <type>wait_queue_entry_t</type>

   referring to themselves, and place that in the queue.

  </para>

	dscc4.setup=	[NET]

	dt_cpu_ftrs=	[PPC]

			Format: {"off" | "known"}

			Control how the dt_cpu_ftrs device-tree binding is

			used for CPU feature discovery and setup (if it

			exists).

			off: Do not use it, fall back to legacy cpu table.

			known: Do not pass through unknown features to guests

			or userspace, only those that the kernel is aware of.

	dump_apple_properties	[X86]

			Dump name and content of EFI device properties on

			x86 Macs.  Useful for driver authors to determine

			expediting.  Set to zero to disable automatic

			expediting.

	stack_guard_gap=	[MM]

			override the default stack gap protection. The value

			is in page units and it defines how many pages prior

			to (for stacks growing down) resp. after (for stacks

			growing up) the main stack are reserved for no other

			mapping. Default value is 256 pages.

	stacktrace	[FTRACE]

			Enabled the stack tracer on boot up.

- #clock-cells : must contain 1

- #reset-cells : must contain 1

For the PRCM CCUs on H3/A64, one more clock is needed:

For the PRCM CCUs on H3/A64, two more clocks are needed:

- "pll-periph": the SoC's peripheral PLL from the main CCU

- "iosc": the SoC's internal frequency oscillator

Example for generic CCU:

r_ccu: clock@01f01400 {

	compatible = "allwinner,sun50i-a64-r-ccu";

	reg = <0x01f01400 0x100>;

	clocks = <&osc24M>, <&osc32k>, <&iosc>;

	clock-names = "hosc", "losc", "iosc";

	clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>;

	clock-names = "hosc", "losc", "iosc", "pll-periph";

	#clock-cells = <1>;

	#reset-cells = <1>;

};

                control gpios

 - threshold:   allows setting the "click"-threshold in the range

                from 20 to 80.

                from 0 to 80.

 - gain:        allows setting the sensitivity in the range from 0 to

                31. Note that lower values indicate higher

- reg:                  Base address of PMIC on Hi6220 SoC.

- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).

- pmic-gpios:           The GPIO used by PMIC IRQ.

- #clock-cells:		From common clock binding; shall be set to 0

Optional properties:

- clock-output-names: From common clock binding to override the

  default output clock name

Example:

	pmic: pmic@f8000000 {

		interrupt-controller;

		#interrupt-cells = <2>;

		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;

		#clock-cells = <0>;

	}