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Commit 8f55fd60 authored by Minas Harutyunyan's avatar Minas Harutyunyan Committed by Felipe Balbi
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usb: dwc2: Change TxFIFO and RxFIFO flushing flow 



Before flushing fifos required to check AHB master state and
lush when AHB master is in IDLE state.

Acked-by: default avatarJohn Youn <johnyoun@synopsys.com>
Signed-off-by: default avatarMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: default avatarGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 92a8dd26

drivers/usb/dwc2/core.c

+10 −0
Original line number Diff line number Diff line
@@ -675,6 +675,11 @@ void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num) 


	dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num);



	/* Wait for AHB master IDLE state */

	if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000))

		dev_warn(hsotg->dev, "%s:  HANG! AHB Idle GRSCTL\n",

			 __func__);



	greset = GRSTCTL_TXFFLSH;

	greset |= num << GRSTCTL_TXFNUM_SHIFT & GRSTCTL_TXFNUM_MASK;

	dwc2_writel(greset, hsotg->regs + GRSTCTL);
@@ -698,6 +703,11 @@ void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg) 


	dev_vdbg(hsotg->dev, "%s()\n", __func__);



	/* Wait for AHB master IDLE state */

	if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000))

		dev_warn(hsotg->dev, "%s:  HANG! AHB Idle GRSCTL\n",

			 __func__);



	greset = GRSTCTL_RXFFLSH;

	dwc2_writel(greset, hsotg->regs + GRSTCTL);