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Commit 8f4c3446 authored by Will Deacon's avatar Will Deacon Committed by Linus Torvalds
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lockref: use cmpxchg64 explicitly for lockless updates



The cmpxchg() function tends not to support 64-bit arguments on 32-bit
architectures.  This could be either due to use of unsigned long
arguments (like on ARM) or lack of instruction support (cmpxchgq on
x86).  However, these architectures may implement a specific cmpxchg64()
function to provide 64-bit cmpxchg support instead.

Since the lockref code requires a 64-bit cmpxchg and relies on the
architecture selecting ARCH_USE_CMPXCHG_LOCKREF, move to using cmpxchg64
instead of cmpxchg and allow 32-bit architectures to make use of the
lockless lockref implementation.

Cc: Waiman Long <Waiman.Long@hp.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent dcb30e65
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+2 −2
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@
	while (likely(arch_spin_value_unlocked(old.lock.rlock.raw_lock))) {  	\
		struct lockref new = old, prev = old;				\
		CODE								\
		old.lock_count = cmpxchg(&lockref->lock_count,			\
		old.lock_count = cmpxchg64(&lockref->lock_count,		\
					   old.lock_count, new.lock_count);	\
		if (likely(old.lock_count == prev.lock_count)) {		\
			SUCCESS;						\