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Commit 8ca9c08d authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
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powerpc/book3s: Add an HV variant of FIXUP_ENDIAN that is recoverable 



Add an HV variant of FIXUP_ENDIAN which uses HSRR[01] and does not
clear MSR[RI], which improves recoverability.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent f848ea7f

arch/powerpc/include/asm/ppc_asm.h

+22 −0
Original line number Diff line number Diff line
@@ -774,6 +774,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) 
#ifdef CONFIG_PPC_BOOK3E

#define FIXUP_ENDIAN

#else

/*

 * This version may be used in in HV or non-HV context.

 * MSR[EE] must be disabled.

 */

#define FIXUP_ENDIAN						   \

	tdi   0,0,0x48;	  /* Reverse endian of b . + 8		*/ \

	b     191f;	  /* Skip trampoline if endian is good	*/ \
@@ -789,6 +793,24 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) 
	.long 0x2400004c; /* rfid				*/ \

191:



/*

 * This version that may only be used with MSR[HV]=1

 * - Does not clear MSR[RI], so more robust.

 * - Slightly smaller and faster.

 */

#define FIXUP_ENDIAN_HV						   \

	tdi   0,0,0x48;	  /* Reverse endian of b . + 8		*/ \

	b     191f;	  /* Skip trampoline if endian is good	*/ \

	.long 0xa600607d; /* mfmsr r11				*/ \

	.long 0x01006b69; /* xori r11,r11,1			*/ \

	.long 0x05009f42; /* bcl 20,31,$+4			*/ \

	.long 0xa602487d; /* mflr r10				*/ \

	.long 0x14004a39; /* addi r10,r10,20			*/ \

	.long 0xa64b5a7d; /* mthsrr0 r10			*/ \

	.long 0xa64b7b7d; /* mthsrr1 r11			*/ \

	.long 0x2402004c; /* hrfid				*/ \

191:



#endif /* !CONFIG_PPC_BOOK3E */



#endif /*  __ASSEMBLY__ */