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Commit 8b88ed3c authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull KVM fixes from Radim Krčmář:
 "ARM:
   - Lazy FPSIMD switching fixes
   - Really disable compat ioctls on architectures that don't want it
   - Disable compat on arm64 (it was never implemented...)
   - Rely on architectural requirements for GICV on GICv3
   - Detect bad alignments in unmap_stage2_range

  x86:
   - Add nested VM entry checks to avoid broken error recovery path
   - Minor documentation fix"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: fix KVM_CAP_HYPERV_TLBFLUSH paragraph number
  kvm: vmx: Nested VM-entry prereqs for event inj.
  KVM: arm64: Prevent KVM_COMPAT from being selected
  KVM: Enforce error in ioctl for compat tasks when !KVM_COMPAT
  KVM: arm/arm64: add WARN_ON if size is not PAGE_SIZE aligned in unmap_stage2_range
  KVM: arm64: Avoid mistaken attempts to save SVE state for vcpus
  KVM: arm64/sve: Fix SVE trap restoration for non-current tasks
  KVM: arm64: Don't mask softirq with IRQs disabled in vcpu_put()
  arm64: Introduce sysreg_clear_set()
  KVM: arm/arm64: Drop resource size check for GICV window
parents 4ab59fcf 2ddc6498

Documentation/virtual/kvm/api.txt

+1 −1
Original line number Diff line number Diff line
@@ -4610,7 +4610,7 @@ This capability indicates that kvm will implement the interfaces to handle 
reset, migration and nested KVM for branch prediction blocking. The stfle

facility 82 should not be provided to the guest without this capability.



8.14 KVM_CAP_HYPERV_TLBFLUSH

8.18 KVM_CAP_HYPERV_TLBFLUSH



Architectures: x86

arch/arm64/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -306,6 +306,7 @@ struct kvm_vcpu_arch { 
#define KVM_ARM64_FP_ENABLED		(1 << 1) /* guest FP regs loaded */

#define KVM_ARM64_FP_HOST		(1 << 2) /* host FP regs loaded */

#define KVM_ARM64_HOST_SVE_IN_USE	(1 << 3) /* backup for host TIF_SVE */

#define KVM_ARM64_HOST_SVE_ENABLED	(1 << 4) /* SVE enabled for EL0 */



#define vcpu_gp_regs(v)		(&(v)->arch.ctxt.gp_regs)

arch/arm64/include/asm/sysreg.h

+11 −0
Original line number Diff line number Diff line
@@ -728,6 +728,17 @@ asm( 
	asm volatile("msr_s " __stringify(r) ", %x0" : : "rZ" (__val));	\

} while (0)



/*

 * Modify bits in a sysreg. Bits in the clear mask are zeroed, then bits in the

 * set mask are set. Other bits are left as-is.

 */

#define sysreg_clear_set(sysreg, clear, set) do {			\

	u64 __scs_val = read_sysreg(sysreg);				\

	u64 __scs_new = (__scs_val & ~(u64)(clear)) | (set);		\

	if (__scs_new != __scs_val)					\

		write_sysreg(__scs_new, sysreg);			\

} while (0)



static inline void config_sctlr_el1(u32 clear, u32 set)

{

	u32 val;

arch/arm64/kvm/fpsimd.c

+27 −9
Original line number Diff line number Diff line
@@ -5,13 +5,14 @@ 
 * Copyright 2018 Arm Limited

 * Author: Dave Martin <Dave.Martin@arm.com>

 */

#include <linux/bottom_half.h>

#include <linux/irqflags.h>

#include <linux/sched.h>

#include <linux/thread_info.h>

#include <linux/kvm_host.h>

#include <asm/kvm_asm.h>

#include <asm/kvm_host.h>

#include <asm/kvm_mmu.h>

#include <asm/sysreg.h>



/*

 * Called on entry to KVM_RUN unless this vcpu previously ran at least
@@ -61,10 +62,16 @@ void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) 
{

	BUG_ON(!current->mm);



	vcpu->arch.flags &= ~(KVM_ARM64_FP_ENABLED | KVM_ARM64_HOST_SVE_IN_USE);

	vcpu->arch.flags &= ~(KVM_ARM64_FP_ENABLED |

			      KVM_ARM64_HOST_SVE_IN_USE |

			      KVM_ARM64_HOST_SVE_ENABLED);

	vcpu->arch.flags |= KVM_ARM64_FP_HOST;



	if (test_thread_flag(TIF_SVE))

		vcpu->arch.flags |= KVM_ARM64_HOST_SVE_IN_USE;



	if (read_sysreg(cpacr_el1) & CPACR_EL1_ZEN_EL0EN)

		vcpu->arch.flags |= KVM_ARM64_HOST_SVE_ENABLED;

}



/*
@@ -92,19 +99,30 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) 
 */

void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)

{

	local_bh_disable();

	unsigned long flags;



	update_thread_flag(TIF_SVE,

			   vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE);

	local_irq_save(flags);



	if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {

		/* Clean guest FP state to memory and invalidate cpu view */

		fpsimd_save();

		fpsimd_flush_cpu_state();

	} else if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {

		/* Ensure user trap controls are correctly restored */

		fpsimd_bind_task_to_cpu();

	} else if (system_supports_sve()) {

		/*

		 * The FPSIMD/SVE state in the CPU has not been touched, and we

		 * have SVE (and VHE): CPACR_EL1 (alias CPTR_EL2) has been

		 * reset to CPACR_EL1_DEFAULT by the Hyp code, disabling SVE

		 * for EL0.  To avoid spurious traps, restore the trap state

		 * seen by kvm_arch_vcpu_load_fp():

		 */

		if (vcpu->arch.flags & KVM_ARM64_HOST_SVE_ENABLED)

			sysreg_clear_set(CPACR_EL1, 0, CPACR_EL1_ZEN_EL0EN);

		else

			sysreg_clear_set(CPACR_EL1, CPACR_EL1_ZEN_EL0EN, 0);

	}



	local_bh_enable();

	update_thread_flag(TIF_SVE,

			   vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE);



	local_irq_restore(flags);

}

arch/x86/include/asm/vmx.h

+3 −0
Original line number Diff line number Diff line
@@ -114,6 +114,7 @@ 
#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK	0x0000001f

#define VMX_MISC_SAVE_EFER_LMA			0x00000020

#define VMX_MISC_ACTIVITY_HLT			0x00000040

#define VMX_MISC_ZERO_LEN_INS			0x40000000



/* VMFUNC functions */

#define VMX_VMFUNC_EPTP_SWITCHING               0x00000001
@@ -351,11 +352,13 @@ enum vmcs_field { 
#define VECTORING_INFO_VALID_MASK       	INTR_INFO_VALID_MASK



#define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */

#define INTR_TYPE_RESERVED              (1 << 8) /* reserved */

#define INTR_TYPE_NMI_INTR		(2 << 8) /* NMI */

#define INTR_TYPE_HARD_EXCEPTION	(3 << 8) /* processor exception */

#define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */

#define INTR_TYPE_PRIV_SW_EXCEPTION	(5 << 8) /* ICE breakpoint - undocumented */

#define INTR_TYPE_SOFT_EXCEPTION	(6 << 8) /* software exception */

#define INTR_TYPE_OTHER_EVENT           (7 << 8) /* other event */



/* GUEST_INTERRUPTIBILITY_INFO flags. */

#define GUEST_INTR_STATE_STI		0x00000001