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Commit 8b4a3587 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'reset-for-4.13' of git://git.pengutronix.de/git/pza/linux into next/drivers

Reset controller changes for v4.13

- Use devm_kcalloc to allocate the channels array in sti/reset-syscfg
- Rename the TI_SYSCON_RESET Kconfig option to RESET_TI_SYSCON for
  consistency
- Add new reset driver and DT bindings for Cortina Systems Gemini
  reset controller

* tag 'reset-for-4.13' of git://git.pengutronix.de/git/pza/linux

:
  reset: Add a Gemini reset controller
  reset: add DT bindings header for Gemini reset controller
  reset: ti_syscon: Rename TI_SYSCON_RESET to RESET_TI_SYSCON
  reset: sti: Use devm_kcalloc() in syscfg_reset_controller_register()

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents cd8eb629 2acb037f
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+8 −1
Original line number Diff line number Diff line
@@ -34,6 +34,13 @@ config RESET_BERLIN
	help
	  This enables the reset controller driver for Marvell Berlin SoCs.

config RESET_GEMINI
	bool "Gemini Reset Driver" if COMPILE_TEST
	default ARCH_GEMINI
	select MFD_SYSCON
	help
	  This enables the reset controller driver for Cortina Systems Gemini.

config RESET_IMX7
	bool "i.MX7 Reset Driver" if COMPILE_TEST
	default SOC_IMX7D
@@ -80,7 +87,7 @@ config RESET_SUNXI
	help
	  This enables the reset driver for Allwinner SoCs.

config TI_SYSCON_RESET
config RESET_TI_SYSCON
	tristate "TI SYSCON Reset Driver"
	depends on HAS_IOMEM
	select MFD_SYSCON
+2 −1
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o
obj-$(CONFIG_RESET_GEMINI) += reset-gemini.o
obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
@@ -13,7 +14,7 @@ obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
obj-$(CONFIG_RESET_STM32) += reset-stm32.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
obj-$(CONFIG_TI_SYSCON_RESET) += reset-ti-syscon.o
obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
obj-$(CONFIG_RESET_ZX2967) += reset-zx2967.o
obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
+110 −0
Original line number Diff line number Diff line
/*
 * Cortina Gemini Reset controller driver
 * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/err.h>
#include <linux/init.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <dt-bindings/reset/cortina,gemini-reset.h>

/**
 * struct gemini_reset - gemini reset controller
 * @map: regmap to access the containing system controller
 * @rcdev: reset controller device
 */
struct gemini_reset {
	struct regmap *map;
	struct reset_controller_dev rcdev;
};

#define GEMINI_GLOBAL_SOFT_RESET 0x0c

#define to_gemini_reset(p) \
	container_of((p), struct gemini_reset, rcdev)

/*
 * This is a self-deasserting reset controller.
 */
static int gemini_reset(struct reset_controller_dev *rcdev,
			unsigned long id)
{
	struct gemini_reset *gr = to_gemini_reset(rcdev);

	/* Manual says to always set BIT 30 (CPU1) to 1 */
	return regmap_write(gr->map,
			    GEMINI_GLOBAL_SOFT_RESET,
			    BIT(GEMINI_RESET_CPU1) | BIT(id));
}

static int gemini_reset_status(struct reset_controller_dev *rcdev,
			     unsigned long id)
{
	struct gemini_reset *gr = to_gemini_reset(rcdev);
	u32 val;
	int ret;

	ret = regmap_read(gr->map, GEMINI_GLOBAL_SOFT_RESET, &val);
	if (ret)
		return ret;

	return !!(val & BIT(id));
}

static const struct reset_control_ops gemini_reset_ops = {
	.reset = gemini_reset,
	.status = gemini_reset_status,
};

static int gemini_reset_probe(struct platform_device *pdev)
{
	struct gemini_reset *gr;
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	int ret;

	gr = devm_kzalloc(dev, sizeof(*gr), GFP_KERNEL);
	if (!gr)
		return -ENOMEM;

	gr->map = syscon_node_to_regmap(np);
	if (IS_ERR(gr->map)) {
		ret = PTR_ERR(gr->map);
		dev_err(dev, "unable to get regmap (%d)", ret);
		return ret;
	}
	gr->rcdev.owner = THIS_MODULE;
	gr->rcdev.nr_resets = 32;
	gr->rcdev.ops = &gemini_reset_ops;
	gr->rcdev.of_node = pdev->dev.of_node;

	ret = devm_reset_controller_register(&pdev->dev, &gr->rcdev);
	if (ret)
		return ret;

	dev_info(dev, "registered Gemini reset controller\n");
	return 0;
}

static const struct of_device_id gemini_reset_dt_ids[] = {
	{ .compatible = "cortina,gemini-syscon", },
	{ /* sentinel */ },
};

static struct platform_driver gemini_reset_driver = {
	.probe	= gemini_reset_probe,
	.driver = {
		.name		= "gemini-reset",
		.of_match_table	= gemini_reset_dt_ids,
		.suppress_bind_attrs = true,
	},
};
builtin_platform_driver(gemini_reset_driver);
+2 −4
Original line number Diff line number Diff line
@@ -145,16 +145,14 @@ static int syscfg_reset_controller_register(struct device *dev,
				const struct syscfg_reset_controller_data *data)
{
	struct syscfg_reset_controller *rc;
	size_t size;
	int i, err;

	rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
	if (!rc)
		return -ENOMEM;

	size = sizeof(struct syscfg_reset_channel) * data->nr_channels;

	rc->channels = devm_kzalloc(dev, size, GFP_KERNEL);
	rc->channels = devm_kcalloc(dev, data->nr_channels,
				    sizeof(*rc->channels), GFP_KERNEL);
	if (!rc->channels)
		return -ENOMEM;

+36 −0
Original line number Diff line number Diff line
#ifndef _DT_BINDINGS_RESET_CORTINA_GEMINI_H
#define _DT_BINDINGS_RESET_CORTINA_GEMINI_H

#define GEMINI_RESET_DRAM	0
#define GEMINI_RESET_FLASH	1
#define GEMINI_RESET_IDE	2
#define GEMINI_RESET_RAID	3
#define GEMINI_RESET_SECURITY	4
#define GEMINI_RESET_GMAC0	5
#define GEMINI_RESET_GMAC1	6
#define GEMINI_RESET_PCI	7
#define GEMINI_RESET_USB0	8
#define GEMINI_RESET_USB1	9
#define GEMINI_RESET_DMAC	10
#define GEMINI_RESET_APB	11
#define GEMINI_RESET_LPC	12
#define GEMINI_RESET_LCD	13
#define GEMINI_RESET_INTCON0	14
#define GEMINI_RESET_INTCON1	15
#define GEMINI_RESET_RTC	16
#define GEMINI_RESET_TIMER	17
#define GEMINI_RESET_UART	18
#define GEMINI_RESET_SSP	19
#define GEMINI_RESET_GPIO0	20
#define GEMINI_RESET_GPIO1	21
#define GEMINI_RESET_GPIO2	22
#define GEMINI_RESET_WDOG	23
#define GEMINI_RESET_EXTERN	24
#define GEMINI_RESET_CIR	25
#define GEMINI_RESET_SATA0	26
#define GEMINI_RESET_SATA1	27
#define GEMINI_RESET_TVC	28
#define GEMINI_RESET_CPU1	30
#define GEMINI_RESET_GLOBAL	31

#endif