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Commit 8a5a2ba8 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Mauro Carvalho Chehab
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[media] v4l: vsp1: Add R8A7792 VSP1V support



Add support for the R8A7792 VSP1V cores which are different from the other
gen2 VSP1 cores.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent bffba473
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+22 −0
Original line number Diff line number Diff line
@@ -600,6 +600,28 @@ static const struct vsp1_device_info vsp1_device_infos[] = {
		.wpf_count = 4,
		.num_bru_inputs = 4,
		.uapi = true,
	}, {
		.version = VI6_IP_VERSION_MODEL_VSPS_V2H,
		.model = "VSP1V-S",
		.gen = 2,
		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_LUT
			  | VSP1_HAS_SRU | VSP1_HAS_WPF_VFLIP,
		.rpf_count = 4,
		.uds_count = 1,
		.wpf_count = 4,
		.num_bru_inputs = 4,
		.uapi = true,
	}, {
		.version = VI6_IP_VERSION_MODEL_VSPD_V2H,
		.model = "VSP1V-D",
		.gen = 2,
		.features = VSP1_HAS_BRU | VSP1_HAS_CLU | VSP1_HAS_LUT
			  | VSP1_HAS_LIF,
		.rpf_count = 4,
		.uds_count = 1,
		.wpf_count = 1,
		.num_bru_inputs = 4,
		.uapi = true,
	}, {
		.version = VI6_IP_VERSION_MODEL_VSPI_GEN3,
		.model = "VSP2-I",
+2 −0
Original line number Diff line number Diff line
@@ -660,6 +660,8 @@
#define VI6_IP_VERSION_MODEL_VSPR_H2	(0x0a << 8)
#define VI6_IP_VERSION_MODEL_VSPD_GEN2	(0x0b << 8)
#define VI6_IP_VERSION_MODEL_VSPS_M2	(0x0c << 8)
#define VI6_IP_VERSION_MODEL_VSPS_V2H	(0x12 << 8)
#define VI6_IP_VERSION_MODEL_VSPD_V2H	(0x13 << 8)
#define VI6_IP_VERSION_MODEL_VSPI_GEN3	(0x14 << 8)
#define VI6_IP_VERSION_MODEL_VSPBD_GEN3	(0x15 << 8)
#define VI6_IP_VERSION_MODEL_VSPBC_GEN3	(0x16 << 8)