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Commit 89ef4b62 authored by Michael Turquette's avatar Michael Turquette
Browse files

clk: meson8b: rectify reg offsets with datasheet 



The register offsets in the data sheet are confusing. Document them more
thoroughly.

Tested-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent 1a695a90

drivers/clk/meson/meson8b-clkc.c

+12 −3
Original line number Diff line number Diff line
@@ -24,10 +24,19 @@ 


#include "clkc.h"



/*

 * Clock controller register offsets

 *

 * Register offsets from the HardKernel[0] data sheet are listed in comment

 * blocks below. Those offsets must be multiplied by 4 before adding them to

 * the base address to get the right value

 *

 * [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf

 */

#define MESON8B_REG_CTL0_ADDR		0x0000

#define MESON8B_REG_SYS_CPU_CNTL1	0x015c

#define MESON8B_REG_HHI_MPEG		0x0174

#define MESON8B_REG_MALI		0x01b0

#define MESON8B_REG_SYS_CPU_CNTL1	0x015c /* 0x57 offset in data sheet */

#define MESON8B_REG_HHI_MPEG		0x0174 /* 0x5d offset in data sheet */

#define MESON8B_REG_MALI		0x01b0 /* 0x6c offset in data sheet */

#define MESON8B_REG_PLL_FIXED		0x0280

#define MESON8B_REG_PLL_SYS		0x0300

#define MESON8B_REG_PLL_VID		0x0320