Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 89662e56 authored by Abel Gordon's avatar Abel Gordon Committed by Gleb Natapov
Browse files

KVM: nVMX: Shadow-vmcs control fields/bits 



Add definitions for all the vmcs control fields/bits
required to enable vmcs-shadowing

Signed-off-by: default avatarAbel Gordon <abelg@il.ibm.com>
Reviewed-by: default avatarOrit Wasserman <owasserm@redhat.com>
Signed-off-by: default avatarGleb Natapov <gleb@redhat.com>
parent d10ab869

arch/x86/include/asm/vmx.h

+3 −0
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ 
#define SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY    0x00000200

#define SECONDARY_EXEC_PAUSE_LOOP_EXITING	0x00000400

#define SECONDARY_EXEC_ENABLE_INVPCID		0x00001000

#define SECONDARY_EXEC_SHADOW_VMCS              0x00004000





#define PIN_BASED_EXT_INTR_MASK                 0x00000001
@@ -150,6 +151,8 @@ enum vmcs_field { 
	EOI_EXIT_BITMAP2_HIGH           = 0x00002021,

	EOI_EXIT_BITMAP3                = 0x00002022,

	EOI_EXIT_BITMAP3_HIGH           = 0x00002023,

	VMREAD_BITMAP                   = 0x00002026,

	VMWRITE_BITMAP                  = 0x00002028,

	GUEST_PHYSICAL_ADDRESS          = 0x00002400,

	GUEST_PHYSICAL_ADDRESS_HIGH     = 0x00002401,

	VMCS_LINK_POINTER               = 0x00002800,

arch/x86/include/uapi/asm/msr-index.h

+2 −0
Original line number Diff line number Diff line
@@ -522,6 +522,8 @@ 
#define VMX_BASIC_MEM_TYPE_WB	6LLU

#define VMX_BASIC_INOUT		0x0040000000000000LLU



/* MSR_IA32_VMX_MISC bits */

#define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29)

/* AMD-V MSRs */



#define MSR_VM_CR                       0xc0010114