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Commit 8814b40b authored by Mark Yao's avatar Mark Yao
Browse files

drm/rockchip: dw_hdmi: introduce the pclk for grf 



For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Signed-off-by: default avatarYakir Yang <ykk@rock-chips.com>
Signed-off-by: default avatarMark Yao <mark.yao@rock-chips.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent 5e3bc6d1

Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt

+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ Optional properties 
  I2C master controller.

- clock-names: See dw_hdmi.txt. The "cec" clock is optional.

- clock-names: May contain "cec" as defined in dw_hdmi.txt.

- clock-names: May contain "grf", power for grf io.

- clock-names: May contain "vpll", external clock for some hdmi phy.



Example:

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

+18 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ struct rockchip_hdmi { 
	struct drm_encoder encoder;

	const struct rockchip_hdmi_chip_data *chip_data;

	struct clk *vpll_clk;

	struct clk *grf_clk;

};



#define to_rockchip_hdmi(x)	container_of(x, struct rockchip_hdmi, x)
@@ -181,6 +182,16 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) 
		return PTR_ERR(hdmi->vpll_clk);

	}



	hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");

	if (PTR_ERR(hdmi->grf_clk) == -ENOENT) {

		hdmi->grf_clk = NULL;

	} else if (PTR_ERR(hdmi->grf_clk) == -EPROBE_DEFER) {

		return -EPROBE_DEFER;

	} else if (IS_ERR(hdmi->grf_clk)) {

		dev_err(hdmi->dev, "failed to get grf clock\n");

		return PTR_ERR(hdmi->grf_clk);

	}



	ret = clk_prepare_enable(hdmi->vpll_clk);

	if (ret) {

		dev_err(hdmi->dev, "Failed to enable HDMI vpll: %d\n", ret);
@@ -246,10 +257,17 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder) 
	else

		val = hdmi->chip_data->lcdsel_big;



	ret = clk_prepare_enable(hdmi->grf_clk);

	if (ret < 0) {

		dev_err(hdmi->dev, "failed to enable grfclk %d\n", ret);

		return;

	}



	ret = regmap_write(hdmi->regmap, hdmi->chip_data->lcdsel_grf_reg, val);

	if (ret != 0)

		dev_err(hdmi->dev, "Could not write to GRF: %d\n", ret);



	clk_disable_unprepare(hdmi->grf_clk);

	dev_dbg(hdmi->dev, "vop %s output to hdmi\n",

		ret ? "LIT" : "BIG");

}