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Commit 85aae3fc authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branches 'pci/domain' and 'pci/hotplug' into next 

* pci/domain:
  ARM/PCI: Move to generic PCI domains
  CNS3xxx: Remove artificial dependency on pci_sys_data domain.
  PCI: Move domain assignment from arm64 to generic code

* pci/hotplug:
  PCI: Delete unnecessary NULL pointer checks
parents 97bf6af1 8c7d1474 17f14b51

arch/arm/Kconfig

+3 −0
Original line number Diff line number Diff line
@@ -1279,6 +1279,9 @@ config PCI_DOMAINS 
	bool

	depends on PCI



config PCI_DOMAINS_GENERIC

	def_bool PCI_DOMAINS



config PCI_NANOENGINE

	bool "BSE nanoEngine PCI support"

	depends on SA1100_NANOENGINE

arch/arm/include/asm/mach/pci.h

+0 −6
Original line number Diff line number Diff line
@@ -19,9 +19,6 @@ struct pci_bus; 
struct device;



struct hw_pci {

#ifdef CONFIG_PCI_DOMAINS

	int		domain;

#endif

#ifdef CONFIG_PCI_MSI

	struct msi_controller *msi_ctrl;

#endif
@@ -45,9 +42,6 @@ struct hw_pci { 
 * Per-controller structure

 */

struct pci_sys_data {

#ifdef CONFIG_PCI_DOMAINS

	int		domain;

#endif

#ifdef CONFIG_PCI_MSI

	struct msi_controller *msi_ctrl;

#endif

arch/arm/include/asm/pci.h

+0 −7
Original line number Diff line number Diff line
@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void) 
}



#ifdef CONFIG_PCI_DOMAINS

static inline int pci_domain_nr(struct pci_bus *bus)

{

	struct pci_sys_data *root = bus->sysdata;



	return root->domain;

}



static inline int pci_proc_domain(struct pci_bus *bus)

{

	return pci_domain_nr(bus);

arch/arm/kernel/bios32.c

+0 −3
Original line number Diff line number Diff line
@@ -463,9 +463,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, 
		if (!sys)

			panic("PCI: unable to allocate sys data!");



#ifdef CONFIG_PCI_DOMAINS

		sys->domain  = hw->domain;

#endif

#ifdef CONFIG_PCI_MSI

		sys->msi_ctrl = hw->msi_ctrl;

#endif

arch/arm/mach-cns3xxx/pcie.c

+17 −23
Original line number Diff line number Diff line
@@ -30,18 +30,15 @@ struct cns3xxx_pcie { 
	unsigned int irqs[2];

	struct resource res_io;

	struct resource res_mem;

	struct hw_pci hw_pci;



	int port;

	bool linked;

};



static struct cns3xxx_pcie cns3xxx_pcie[]; /* forward decl. */



static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata)

{

	struct pci_sys_data *root = sysdata;



	return &cns3xxx_pcie[root->domain];

	return root->private_data;

}



static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev)
@@ -192,13 +189,7 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { 
			.flags = IORESOURCE_MEM,

		},

		.irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },

		.hw_pci = {

			.domain = 0,

			.nr_controllers = 1,

			.ops = &cns3xxx_pcie_ops,

			.setup = cns3xxx_pci_setup,

			.map_irq = cns3xxx_pcie_map_irq,

		},

		.port = 0,

	},

	[1] = {

		.host_regs = (void __iomem *)CNS3XXX_PCIE1_HOST_BASE_VIRT,
@@ -217,19 +208,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[] = { 
			.flags = IORESOURCE_MEM,

		},

		.irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },

		.hw_pci = {

			.domain = 1,

			.nr_controllers = 1,

			.ops = &cns3xxx_pcie_ops,

			.setup = cns3xxx_pci_setup,

			.map_irq = cns3xxx_pcie_map_irq,

		},

		.port = 1,

	},

};



static void __init cns3xxx_pcie_check_link(struct cns3xxx_pcie *cnspci)

{

	int port = cnspci->hw_pci.domain;

	int port = cnspci->port;

	u32 reg;

	unsigned long time;
@@ -260,9 +245,9 @@ static void __init cns3xxx_pcie_check_link(struct cns3xxx_pcie *cnspci) 


static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci)

{

	int port = cnspci->hw_pci.domain;

	int port = cnspci->port;

	struct pci_sys_data sd = {

		.domain = port,

		.private_data = cnspci,

	};

	struct pci_bus bus = {

		.number = 0,
@@ -323,6 +308,14 @@ static int cns3xxx_pcie_abort_handler(unsigned long addr, unsigned int fsr, 
void __init cns3xxx_pcie_init_late(void)

{

	int i;

	void *private_data;

	struct hw_pci hw_pci = {

	       .nr_controllers = 1,

	       .ops = &cns3xxx_pcie_ops,

	       .setup = cns3xxx_pci_setup,

	       .map_irq = cns3xxx_pcie_map_irq,

	       .private_data = &private_data,

	};



	pcibios_min_io = 0;

	pcibios_min_mem = 0;
@@ -335,7 +328,8 @@ void __init cns3xxx_pcie_init_late(void) 
		cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));

		cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);

		cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);

		pci_common_init(&cns3xxx_pcie[i].hw_pci);

		private_data = &cns3xxx_pcie[i];

		pci_common_init(&hw_pci);

	}



	pci_assign_unassigned_resources();