Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 855822be authored by Matthew Auld's avatar Matthew Auld Committed by Chris Wilson
Browse files

drm/i915: align 64K objects to 2M 



We can't mix 64K and 4K pte's in the same page-table, so for now we
align 64K objects to 2M to avoid any potential mixing. This is
potentially wasteful but in reality shouldn't be too bad since this only
applies to the virtual address space of a 48b PPGTT.

v2: don't separate logically connected ops

Suggested-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171006145041.21673-10-matthew.auld@intel.com


Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171006221833.32439-9-chris@chris-wilson.co.uk
parent 7464284b

drivers/gpu/drm/i915/i915_vma.c

+11 −1
Original line number Diff line number Diff line
@@ -503,10 +503,20 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) 
		 */

		if (upper_32_bits(end - 1) &&

		    vma->page_sizes.sg > I915_GTT_PAGE_SIZE) {

			/*

			 * We can't mix 64K and 4K PTEs in the same page-table

			 * (2M block), and so to avoid the ugliness and

			 * complexity of coloring we opt for just aligning 64K

			 * objects to 2M.

			 */

			u64 page_alignment =

				rounddown_pow_of_two(vma->page_sizes.sg);

				rounddown_pow_of_two(vma->page_sizes.sg |

						     I915_GTT_PAGE_SIZE_2M);



			alignment = max(alignment, page_alignment);



			if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K)

				size = round_up(size, I915_GTT_PAGE_SIZE_2M);

		}



		ret = i915_gem_gtt_insert(vma->vm, &vma->node,