Loading arch/mips/include/uapi/asm/inst.h +1 −1 Original line number Diff line number Diff line Loading @@ -33,7 +33,7 @@ enum major_op { sdl_op, sdr_op, swr_op, cache_op, ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op, lld_op, ldc1_op, ldc2_op, ld_op, sc_op, swc1_op, swc2_op, major_3b_op, sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op, scd_op, sdc1_op, sdc2_op, sd_op }; Loading arch/mips/kernel/branch.c +10 −0 Original line number Diff line number Diff line Loading @@ -789,6 +789,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, } regs->cp0_epc += 8; break; case balc6_op: if (!cpu_has_mips_r6) { ret = -SIGILL; break; } /* Compact branch: BALC */ regs->regs[31] = epc + 4; epc += 4 + (insn.i_format.simmediate << 2); regs->cp0_epc = epc; break; #endif case cbcond0_op: case cbcond1_op: Loading arch/mips/math-emu/cp1emu.c +8 −0 Original line number Diff line number Diff line Loading @@ -670,6 +670,14 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, *contpc = regs->cp0_epc + dec_insn.pc_inc + dec_insn.next_pc_inc; return 1; case balc6_op: if (!cpu_has_mips_r6) break; regs->regs[31] = regs->cp0_epc + 4; *contpc = regs->cp0_epc + dec_insn.pc_inc + dec_insn.next_pc_inc; return 1; #endif case cop0_op: Loading Loading
arch/mips/include/uapi/asm/inst.h +1 −1 Original line number Diff line number Diff line Loading @@ -33,7 +33,7 @@ enum major_op { sdl_op, sdr_op, swr_op, cache_op, ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op, lld_op, ldc1_op, ldc2_op, ld_op, sc_op, swc1_op, swc2_op, major_3b_op, sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op, scd_op, sdc1_op, sdc2_op, sd_op }; Loading
arch/mips/kernel/branch.c +10 −0 Original line number Diff line number Diff line Loading @@ -789,6 +789,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, } regs->cp0_epc += 8; break; case balc6_op: if (!cpu_has_mips_r6) { ret = -SIGILL; break; } /* Compact branch: BALC */ regs->regs[31] = epc + 4; epc += 4 + (insn.i_format.simmediate << 2); regs->cp0_epc = epc; break; #endif case cbcond0_op: case cbcond1_op: Loading
arch/mips/math-emu/cp1emu.c +8 −0 Original line number Diff line number Diff line Loading @@ -670,6 +670,14 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, *contpc = regs->cp0_epc + dec_insn.pc_inc + dec_insn.next_pc_inc; return 1; case balc6_op: if (!cpu_has_mips_r6) break; regs->regs[31] = regs->cp0_epc + 4; *contpc = regs->cp0_epc + dec_insn.pc_inc + dec_insn.next_pc_inc; return 1; #endif case cop0_op: Loading