Merge branch 'drm-rockchip-next-fixes-05-03' of... (84c8a2de) · Commits · e / devices / android_kernel_teracube_emerald

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c

+27 −21

Original line number	Diff line number	Diff line
		@@ -114,27 +114,6 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
		int ret;
		u32 val;

		/*
		* FIXME(Yakir): driver should configure the CRTC output video
		* mode with the display information which indicated the monitor
		* support colorimetry.
		*
		* But don't know why the CRTC driver seems could only output the
		* RGBaaa rightly. For example, if connect the "innolux,n116bge"
		* eDP screen, EDID would indicated that screen only accepted the
		* 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
		* screen would show a blue picture (RGB888 show a green picture).
		* But if I configure CTRC to RGBaaa, and eDP driver still keep
		* RGB666 input video mode, then screen would works prefect.
		*/
		ret = rockchip_drm_crtc_mode_config(encoder->crtc,
		DRM_MODE_CONNECTOR_eDP,
		ROCKCHIP_OUT_MODE_AAAA);
		if (ret < 0) {
		dev_err(dp->dev, "Could not set crtc mode config (%d)\n", ret);
		return;
		}

		ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
		if (ret < 0)
		return;
		@@ -158,11 +137,38 @@ static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
		/* do nothing */
		}

		static int
		rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
		struct drm_crtc_state *crtc_state,
		struct drm_connector_state *conn_state)
		{
		struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);

		/*
		* FIXME(Yakir): driver should configure the CRTC output video
		* mode with the display information which indicated the monitor
		* support colorimetry.
		*
		* But don't know why the CRTC driver seems could only output the
		* RGBaaa rightly. For example, if connect the "innolux,n116bge"
		* eDP screen, EDID would indicated that screen only accepted the
		* 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
		* screen would show a blue picture (RGB888 show a green picture).
		* But if I configure CTRC to RGBaaa, and eDP driver still keep
		* RGB666 input video mode, then screen would works prefect.
		*/
		s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
		s->output_type = DRM_MODE_CONNECTOR_eDP;

		return 0;
		}

		static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = {
		.mode_fixup = rockchip_dp_drm_encoder_mode_fixup,
		.mode_set = rockchip_dp_drm_encoder_mode_set,
		.enable = rockchip_dp_drm_encoder_enable,
		.disable = rockchip_dp_drm_encoder_nop,
		.atomic_check = rockchip_dp_drm_encoder_atomic_check,
		};

		static void rockchip_dp_drm_encoder_destroy(struct drm_encoder *encoder)

drivers/gpu/drm/rockchip/dw-mipi-dsi.c

+24 −14

Original line number	Diff line number	Diff line
		@@ -879,7 +879,6 @@ static void dw_mipi_dsi_encoder_commit(struct drm_encoder *encoder)
		{
		struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
		int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder);
		u32 interface_pix_fmt;
		u32 val;

		if (clk_prepare_enable(dsi->pclk)) {
		@@ -895,31 +894,41 @@ static void dw_mipi_dsi_encoder_commit(struct drm_encoder *encoder)

		clk_disable_unprepare(dsi->pclk);

		if (mux)
		val = DSI0_SEL_VOP_LIT \| (DSI0_SEL_VOP_LIT << 16);
		else
		val = DSI0_SEL_VOP_LIT << 16;

		regmap_write(dsi->grf_regmap, GRF_SOC_CON6, val);
		dev_dbg(dsi->dev, "vop %s output to dsi0\n", (mux) ? "LIT" : "BIG");
		}

		static int
		dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder,
		struct drm_crtc_state *crtc_state,
		struct drm_connector_state *conn_state)
		{
		struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
		struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);

		switch (dsi->format) {
		case MIPI_DSI_FMT_RGB888:
		interface_pix_fmt = ROCKCHIP_OUT_MODE_P888;
		s->output_mode = ROCKCHIP_OUT_MODE_P888;
		break;
		case MIPI_DSI_FMT_RGB666:
		interface_pix_fmt = ROCKCHIP_OUT_MODE_P666;
		s->output_mode = ROCKCHIP_OUT_MODE_P666;
		break;
		case MIPI_DSI_FMT_RGB565:
		interface_pix_fmt = ROCKCHIP_OUT_MODE_P565;
		s->output_mode = ROCKCHIP_OUT_MODE_P565;
		break;
		default:
		WARN_ON(1);
		return;
		return -EINVAL;
		}

		rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_DSI,
		interface_pix_fmt);
		s->output_type = DRM_MODE_CONNECTOR_DSI;

		if (mux)
		val = DSI0_SEL_VOP_LIT \| (DSI0_SEL_VOP_LIT << 16);
		else
		val = DSI0_SEL_VOP_LIT << 16;

		regmap_write(dsi->grf_regmap, GRF_SOC_CON6, val);
		dev_dbg(dsi->dev, "vop %s output to dsi0\n", (mux) ? "LIT" : "BIG");
		return 0;
		}

		static struct drm_encoder_helper_funcs
		@@ -927,6 +936,7 @@ dw_mipi_dsi_encoder_helper_funcs = {
		.commit = dw_mipi_dsi_encoder_commit,
		.mode_set = dw_mipi_dsi_encoder_mode_set,
		.disable = dw_mipi_dsi_encoder_disable,
		.atomic_check = dw_mipi_dsi_encoder_atomic_check,
		};

		static struct drm_encoder_funcs dw_mipi_dsi_encoder_funcs = {

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

+14 −3

Original line number	Diff line number	Diff line
		@@ -201,9 +201,6 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
		u32 val;
		int mux;

		rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_HDMIA,
		ROCKCHIP_OUT_MODE_AAAA);

		mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
		if (mux)
		val = HDMI_SEL_VOP_LIT \| (HDMI_SEL_VOP_LIT << 16);
		@@ -215,11 +212,25 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
		(mux) ? "LIT" : "BIG");
		}

		static int
		dw_hdmi_rockchip_encoder_atomic_check(struct drm_encoder *encoder,
		struct drm_crtc_state *crtc_state,
		struct drm_connector_state *conn_state)
		{
		struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);

		s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
		s->output_type = DRM_MODE_CONNECTOR_HDMIA;

		return 0;
		}

		static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = {
		.mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup,
		.mode_set = dw_hdmi_rockchip_encoder_mode_set,
		.enable = dw_hdmi_rockchip_encoder_enable,
		.disable = dw_hdmi_rockchip_encoder_disable,
		.atomic_check = dw_hdmi_rockchip_encoder_atomic_check,
		};

		static const struct dw_hdmi_plat_data rockchip_hdmi_drv_data = {

drivers/gpu/drm/rockchip/inno_hdmi.c

+16 −4

Original line number	Diff line number	Diff line
		@@ -500,9 +500,6 @@ static void inno_hdmi_encoder_enable(struct drm_encoder *encoder)
		{
		struct inno_hdmi *hdmi = to_inno_hdmi(encoder);

		rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_HDMIA,
		ROCKCHIP_OUT_MODE_P888);

		inno_hdmi_set_pwr_mode(hdmi, NORMAL);
		}

		@@ -520,11 +517,25 @@ static bool inno_hdmi_encoder_mode_fixup(struct drm_encoder *encoder,
		return true;
		}

		static int
		inno_hdmi_encoder_atomic_check(struct drm_encoder *encoder,
		struct drm_crtc_state *crtc_state,
		struct drm_connector_state *conn_state)
		{
		struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);

		s->output_mode = ROCKCHIP_OUT_MODE_P888;
		s->output_type = DRM_MODE_CONNECTOR_HDMIA;

		return 0;
		}

		static struct drm_encoder_helper_funcs inno_hdmi_encoder_helper_funcs = {
		.enable = inno_hdmi_encoder_enable,
		.disable = inno_hdmi_encoder_disable,
		.mode_fixup = inno_hdmi_encoder_mode_fixup,
		.mode_set = inno_hdmi_encoder_mode_set,
		.atomic_check = inno_hdmi_encoder_atomic_check,
		};

		static struct drm_encoder_funcs inno_hdmi_encoder_funcs = {
		@@ -855,8 +866,9 @@ static int inno_hdmi_bind(struct device dev, struct device master,

		hdmi->ddc = inno_hdmi_i2c_adapter(hdmi);
		if (IS_ERR(hdmi->ddc)) {
		ret = PTR_ERR(hdmi->ddc);
		hdmi->ddc = NULL;
		return PTR_ERR(hdmi->ddc);
		return ret;
		}

		/*

drivers/gpu/drm/rockchip/rockchip_drm_drv.c

+47 −19

Original line number	Diff line number	Diff line
		@@ -36,6 +36,8 @@
		#define DRIVER_MAJOR 1
		#define DRIVER_MINOR 0

		static bool is_support_iommu = true;

		/*
		* Attach a (component) device to the shared drm dma mapping from master drm
		* device. This is used by the VOPs to map GEM buffers to a common DMA
		@@ -47,6 +49,9 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
		struct dma_iommu_mapping *mapping = drm_dev->dev->archdata.mapping;
		int ret;

		if (!is_support_iommu)
		return 0;

		ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
		if (ret)
		return ret;
		@@ -59,6 +64,9 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
		void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
		struct device *dev)
		{
		if (!is_support_iommu)
		return;

		arm_iommu_detach_device(dev);
		}

		@@ -127,7 +135,7 @@ static void rockchip_drm_crtc_disable_vblank(struct drm_device *dev,
		static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
		{
		struct rockchip_drm_private *private;
		struct dma_iommu_mapping *mapping;
		struct dma_iommu_mapping *mapping = NULL;
		struct device *dev = drm_dev->dev;
		struct drm_connector *connector;
		int ret;
		@@ -152,8 +160,10 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
		goto err_config_cleanup;
		}

		if (is_support_iommu) {
		/* TODO(djkurtz): fetch the mapping start/size from somewhere */
		mapping = arm_iommu_create_mapping(&platform_bus_type, 0x00000000,
		mapping = arm_iommu_create_mapping(&platform_bus_type,
		0x00000000,
		SZ_2G);
		if (IS_ERR(mapping)) {
		ret = PTR_ERR(mapping);
		@@ -169,6 +179,7 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
		ret = arm_iommu_attach_device(dev, mapping);
		if (ret)
		goto err_release_mapping;
		}

		/* Try to bind all sub drivers. */
		ret = component_bind_all(dev, drm_dev);
		@@ -218,6 +229,8 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
		if (ret)
		goto err_vblank_cleanup;

		if (is_support_iommu)
		arm_iommu_release_mapping(mapping);
		return 0;
		err_vblank_cleanup:
		drm_vblank_cleanup(drm_dev);
		@@ -226,9 +239,11 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags)
		err_unbind:
		component_unbind_all(dev, drm_dev);
		err_detach_device:
		if (is_support_iommu)
		arm_iommu_detach_device(dev);
		err_release_mapping:
		arm_iommu_release_mapping(dev->archdata.mapping);
		if (is_support_iommu)
		arm_iommu_release_mapping(mapping);
		err_config_cleanup:
		drm_mode_config_cleanup(drm_dev);
		drm_dev->dev_private = NULL;
		@@ -243,8 +258,8 @@ static int rockchip_drm_unload(struct drm_device *drm_dev)
		drm_vblank_cleanup(drm_dev);
		drm_kms_helper_poll_fini(drm_dev);
		component_unbind_all(dev, drm_dev);
		if (is_support_iommu)
		arm_iommu_detach_device(dev);
		arm_iommu_release_mapping(dev->archdata.mapping);
		drm_mode_config_cleanup(drm_dev);
		drm_dev->dev_private = NULL;

		@@ -488,6 +503,8 @@ static int rockchip_drm_platform_probe(struct platform_device *pdev)
		* works as expected.
		*/
		for (i = 0;; i++) {
		struct device_node *iommu;

		port = of_parse_phandle(np, "ports", i);
		if (!port)
		break;
		@@ -497,6 +514,17 @@ static int rockchip_drm_platform_probe(struct platform_device *pdev)
		continue;
		}

		iommu = of_parse_phandle(port->parent, "iommus", 0);
		if (!iommu \|\| !of_device_is_available(iommu->parent)) {
		dev_dbg(dev, "no iommu attached for %s, using non-iommu buffers\n",
		port->parent->full_name);
		/*
		* if there is a crtc not support iommu, force set all
		* crtc use non-iommu buffer.
		*/
		is_support_iommu = false;
		}

		component_match_add(dev, &match, compare_of, port->parent);
		of_node_put(port);
		}