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Commit 823b7bd5 authored by Gautham R. Shenoy's avatar Gautham R. Shenoy Committed by Michael Ellerman
Browse files

powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro 



Currently all the low-power idle states are expected to wake up
at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
that puts the CPU to an idle state and never returns.

On ISA v3.0, when the ESL and EC bits in the PSSCR are zero, the CPU
is expected to wake up at the next instruction of the idle
instruction.

This patch adds a new macro named IDLE_STATE_ENTER_SEQ_NORET for the
no-return variant and reuses the name IDLE_STATE_ENTER_SEQ
for a variant that allows resuming operation at the instruction next
to the idle-instruction.

Acked-by: default avatarBalbir Singh <bsingharora@gmail.com>
Signed-off-by: default avatarGautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 616badd2

arch/powerpc/include/asm/cpuidle.h

+4 −1
Original line number Diff line number Diff line
@@ -29,6 +29,9 @@ extern u64 pnv_first_deep_stop_state; 
1:	cmpd	cr0,r0,r0;					\

	bne	1b;						\

	IDLE_INST;						\



#define	IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST)			\

	IDLE_STATE_ENTER_SEQ(IDLE_INST)                         \

	b	.

#endif /* CONFIG_PPC_P7_NAP */

arch/powerpc/kernel/exceptions-64s.S

+3 −3
Original line number Diff line number Diff line
@@ -381,12 +381,12 @@ EXC_COMMON_BEGIN(machine_check_handle_early) 
	lbz	r3,PACA_THREAD_IDLE_STATE(r13)

	cmpwi	r3,PNV_THREAD_NAP

	bgt	10f

	IDLE_STATE_ENTER_SEQ(PPC_NAP)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)

	/* No return */

10:

	cmpwi	r3,PNV_THREAD_SLEEP

	bgt	2f

	IDLE_STATE_ENTER_SEQ(PPC_SLEEP)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)

	/* No return */



2:
@@ -400,7 +400,7 @@ EXC_COMMON_BEGIN(machine_check_handle_early) 
	 */

	ori	r13,r13,1

	SET_PACA(r13)

	IDLE_STATE_ENTER_SEQ(PPC_WINKLE)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)

	/* No return */

4:

#endif

arch/powerpc/kernel/idle_book3s.S

+5 −5
Original line number Diff line number Diff line
@@ -205,7 +205,7 @@ pnv_enter_arch207_idle_mode: 
	stb	r3,PACA_THREAD_IDLE_STATE(r13)

	cmpwi	cr3,r3,PNV_THREAD_SLEEP

	bge	cr3,2f

	IDLE_STATE_ENTER_SEQ(PPC_NAP)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)

	/* No return */

2:

	/* Sleep or winkle */
@@ -239,7 +239,7 @@ pnv_fastsleep_workaround_at_entry: 


common_enter: /* common code for all the threads entering sleep or winkle */

	bgt	cr3,enter_winkle

	IDLE_STATE_ENTER_SEQ(PPC_SLEEP)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)



fastsleep_workaround_at_entry:

	ori	r15,r15,PNV_CORE_IDLE_LOCK_BIT
@@ -261,7 +261,7 @@ fastsleep_workaround_at_entry: 
enter_winkle:

	bl	save_sprs_to_stack



	IDLE_STATE_ENTER_SEQ(PPC_WINKLE)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)



/*

 * r3 - requested stop state
@@ -280,7 +280,7 @@ power_enter_stop: 
	ld	r4,ADDROFF(pnv_first_deep_stop_state)(r5)

	cmpd	r3,r4

	bge	2f

	IDLE_STATE_ENTER_SEQ(PPC_STOP)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_STOP)

2:

/*

 * Entering deep idle state.
@@ -302,7 +302,7 @@ lwarx_loop_stop: 


	bl	save_sprs_to_stack



	IDLE_STATE_ENTER_SEQ(PPC_STOP)

	IDLE_STATE_ENTER_SEQ_NORET(PPC_STOP)



_GLOBAL(power7_idle)

	/* Now check if user or arch enabled NAP mode */