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Commit 806334ed authored Feb 23, 2016 by Srinivas Kandagatla Committed by Andy Gross Feb 26, 2016

ARM: dts: apq8064: add i2c6 device node.



This patch adds i2c6 device node and pinctrls required for IFC6410 on
MIPI-CSI connector.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

parent 10e0c161

arch/arm/boot/dts/qcom-apq8064-pins.dtsi

+25 −0

Original line number	Diff line number	Diff line
		@@ -153,6 +153,31 @@
		};
		};

		i2c6_pins: i2c6 {
		mux {
		pins = "gpio16", "gpio17";
		function = "gsbi6";
		};

		pinconf {
		pins = "gpio16", "gpio17";
		drive-strength = <16>;
		bias-disable;
		};
		};

		i2c6_pins_sleep: i2c6_pins_sleep {
		mux {
		pins = "gpio16", "gpio17";
		function = "gpio";
		};
		pinconf {
		pins = "gpio16", "gpio17";
		drive-strength = <2>;
		bias-disable = <0>;
		};
		};

		gsbi6_uart_2pins: gsbi6_uart_2pins {
		mux {
		pins = "gpio14", "gpio15";

arch/arm/boot/dts/qcom-apq8064.dtsi

+11 −0

Original line number	Diff line number	Diff line
		@@ -367,6 +367,17 @@
		clock-names = "core", "iface";
		status = "disabled";
		};

		gsbi6_i2c: i2c@16580000 {
		compatible = "qcom,i2c-qup-v1.1.1";
		pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
		pinctrl-names = "default", "sleep";
		reg = <0x16580000 0x1000>;
		interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
		clocks = <&gcc GSBI6_QUP_CLK>,
		<&gcc GSBI6_H_CLK>;
		clock-names = "core", "iface";
		};
		};

		gsbi7: gsbi@16600000 {