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Commit 7eb1afc9 authored by Paul Walmsley's avatar Paul Walmsley Committed by Russell King
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[ARM] OMAP3 powerdomains: make USBTLL SAR only available on ES3.1 and beyond 

Richard Woodruff writes that chip errata prevent USBTLL SAR from working
on OMAP3 ES levels before ES3.1:

http://marc.info/?l=linux-arm-kernel&m=123319614808833&w=2



Update the OMAP3 powerdomain structures appropriately.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent d41ad520

arch/arm/mach-omap2/powerdomains.h

+2 −1
Original line number Diff line number Diff line
@@ -171,7 +171,8 @@ static struct powerdomain *powerdomains_omap[] __initdata = { 
	&iva2_pwrdm,

	&mpu_34xx_pwrdm,

	&neon_pwrdm,

	&core_34xx_pwrdm,

	&core_34xx_pre_es3_1_pwrdm,

	&core_34xx_es3_1_pwrdm,

	&cam_pwrdm,

	&dss_pwrdm,

	&per_pwrdm,

arch/arm/mach-omap2/powerdomains34xx.h

+23 −2
Original line number Diff line number Diff line
@@ -200,12 +200,33 @@ static struct powerdomain mpu_34xx_pwrdm = { 
};



/* No wkdeps or sleepdeps for 34xx core apparently */

static struct powerdomain core_34xx_pwrdm = {

static struct powerdomain core_34xx_pre_es3_1_pwrdm = {

	.name		  = "core_pwrdm",

	.prcm_offs	  = CORE_MOD,

	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),

	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |

					   CHIP_IS_OMAP3430ES2 |

					   CHIP_IS_OMAP3430ES3_0),

	.pwrsts		  = PWRSTS_OFF_RET_ON,

	.dep_bit	  = OMAP3430_EN_CORE_SHIFT,

	.banks		  = 2,

	.pwrsts_mem_ret	  = {

		[0] = PWRSTS_OFF_RET,	 /* MEM1RETSTATE */

		[1] = PWRSTS_OFF_RET,	 /* MEM2RETSTATE */

	},

	.pwrsts_mem_on	  = {

		[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */

		[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */

	},

};



/* No wkdeps or sleepdeps for 34xx core apparently */

static struct powerdomain core_34xx_es3_1_pwrdm = {

	.name		  = "core_pwrdm",

	.prcm_offs	  = CORE_MOD,

	.omap_chip	  = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),

	.pwrsts		  = PWRSTS_OFF_RET_ON,

	.dep_bit	  = OMAP3430_EN_CORE_SHIFT,

	.flags		  = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */

	.banks		  = 2,

	.pwrsts_mem_ret	  = {

		[0] = PWRSTS_OFF_RET,	 /* MEM1RETSTATE */