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Commit 7d7b4ae4 authored by Kefeng Wang's avatar Kefeng Wang Committed by Will Deacon
Browse files

arm64: cpufeature: append additional id_aa64mmfr2 fields to cpufeature 



There are some new cpu features which can be identified by id_aa64mmfr2,
this patch appends all fields of it.

Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent bf162006

arch/arm64/include/asm/sysreg.h

+4 −0
Original line number Diff line number Diff line
@@ -145,7 +145,11 @@ 
#define ID_AA64MMFR1_VMIDBITS_16	2



/* id_aa64mmfr2 */

#define ID_AA64MMFR2_LVA_SHIFT		16

#define ID_AA64MMFR2_IESB_SHIFT		12

#define ID_AA64MMFR2_LSM_SHIFT		8

#define ID_AA64MMFR2_UAO_SHIFT		4

#define ID_AA64MMFR2_CNP_SHIFT		0



/* id_aa64dfr0 */

#define ID_AA64DFR0_CTX_CMPS_SHIFT	28

arch/arm64/kernel/cpufeature.c

+4 −0
Original line number Diff line number Diff line
@@ -130,7 +130,11 @@ static struct arm64_ftr_bits ftr_id_aa64mmfr1[] = { 
};



static struct arm64_ftr_bits ftr_id_aa64mmfr2[] = {

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_LVA_SHIFT, 4, 0),

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_IESB_SHIFT, 4, 0),

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_LSM_SHIFT, 4, 0),

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_UAO_SHIFT, 4, 0),

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_CNP_SHIFT, 4, 0),

	ARM64_FTR_END,

};