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Unverified Commit 7cff3f16 authored by Huacai Chen's avatar Huacai Chen Committed by Paul Burton
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MIPS: Loongson: Add Loongson-3A R3.1 basic support 



Loongson-3A R3.1 is the bugfix revision of Loongson-3A R3.

All Loongson-3 CPU family:

Code-name         Brand-name       PRId
Loongson-3A R1    Loongson-3A1000  0x6305
Loongson-3A R2    Loongson-3A2000  0x6308
Loongson-3A R3    Loongson-3A3000  0x6309
Loongson-3A R3.1  Loongson-3A3000  0x630d
Loongson-3B R1    Loongson-3B1000  0x6306
Loongson-3B R2    Loongson-3B1500  0x6307

Signed-off-by: default avatarHuacai Chen <chenhc@lemote.com>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19263/
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <james.hogan@mips.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhuacai@gmail.com>
parent c6ea7e97

arch/mips/include/asm/cpu.h

+26 −25
Original line number Diff line number Diff line
@@ -249,7 +249,8 @@ 
#define PRID_REV_LOONGSON3B_R1		0x0006

#define PRID_REV_LOONGSON3B_R2		0x0007

#define PRID_REV_LOONGSON3A_R2		0x0008

#define PRID_REV_LOONGSON3A_R3	0x0009

#define PRID_REV_LOONGSON3A_R3_0	0x0009

#define PRID_REV_LOONGSON3A_R3_1	0x000d



/*

 * Older processors used to encode processor version and revision in two

arch/mips/kernel/cpu-probe.c

+2 −1
Original line number Diff line number Diff line
@@ -1849,7 +1849,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) 
			set_elf_platform(cpu, "loongson3a");

			set_isa(c, MIPS_CPU_ISA_M64R2);

			break;

		case PRID_REV_LOONGSON3A_R3:

		case PRID_REV_LOONGSON3A_R3_0:

		case PRID_REV_LOONGSON3A_R3_1:

			c->cputype = CPU_LOONGSON3;

			__cpu_name[cpu] = "ICT Loongson-3";

			set_elf_platform(cpu, "loongson3a");

arch/mips/loongson64/common/env.c

+2 −1
Original line number Diff line number Diff line
@@ -198,7 +198,8 @@ void __init prom_init_env(void) 
			break;

		case PRID_REV_LOONGSON3A_R1:

		case PRID_REV_LOONGSON3A_R2:

		case PRID_REV_LOONGSON3A_R3:

		case PRID_REV_LOONGSON3A_R3_0:

		case PRID_REV_LOONGSON3A_R3_1:

			cpu_clock_freq = 900000000;

			break;

		case PRID_REV_LOONGSON3B_R1:

arch/mips/loongson64/loongson-3/smp.c

+2 −1
Original line number Diff line number Diff line
@@ -682,7 +682,8 @@ void play_dead(void) 
			(void *)CKSEG1ADDR((unsigned long)loongson3a_r1_play_dead);

		break;

	case PRID_REV_LOONGSON3A_R2:

	case PRID_REV_LOONGSON3A_R3:

	case PRID_REV_LOONGSON3A_R3_0:

	case PRID_REV_LOONGSON3A_R3_1:

		play_dead_at_ckseg1 =

			(void *)CKSEG1ADDR((unsigned long)loongson3a_r2r3_play_dead);

		break;

drivers/platform/mips/cpu_hwmon.c

+2 −1
Original line number Diff line number Diff line
@@ -30,7 +30,8 @@ int loongson3_cpu_temp(int cpu) 
	case PRID_REV_LOONGSON3B_R2:

		reg = ((reg >> 8) & 0xff) - 100;

		break;

	case PRID_REV_LOONGSON3A_R3:

	case PRID_REV_LOONGSON3A_R3_0:

	case PRID_REV_LOONGSON3A_R3_1:

		reg = (reg & 0xffff)*731/0x4000 - 273;

		break;

	}