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Commit 7ab0760f authored by Vasundhara Volam's avatar Vasundhara Volam Committed by David S. Miller
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bnxt_en: Fix VF PCIe link speed and width logic. 



PCIE PCIE_EP_REG_LINK_STATUS_CONTROL register is only defined in PF
config space, so we must read it from the PF.

Fixes: 90c4f788 ("bnxt_en: Report PCIe link speed and width during driver load")
Signed-off-by: default avatarVasundhara Volam <vasundhara-v.volam@broadcom.com>
Signed-off-by: default avatarMichael Chan <michael.chan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e2dc9b6e

drivers/net/ethernet/broadcom/bnxt/bnxt.c

+1 −1
Original line number Diff line number Diff line
@@ -7965,7 +7965,7 @@ static void bnxt_parse_log_pcie_link(struct bnxt *bp) 
	enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;

	enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;



	if (pcie_get_minimum_link(bp->pdev, &speed, &width) ||

	if (pcie_get_minimum_link(pci_physfn(bp->pdev), &speed, &width) ||

	    speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN)

		netdev_info(bp->dev, "Failed to determine PCIe Link Info\n");

	else