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Commit 79ddab3b authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
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arm64: assembler: Align phys_to_pte with pte_to_phys 



pte_to_phys lives in assembler.h and takes its destination register as
the first argument. Move phys_to_pte out of head.S to sit with its
counterpart and rejig it to follow the same calling convention.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent f167211a

arch/arm64/include/asm/assembler.h

+13 −0
Original line number Original line Diff line number Diff line
@@ -523,6 +523,19 @@ alternative_endif 
#endif

#endif

	.endm

	.endm





	.macro	phys_to_pte, pte, phys

#ifdef CONFIG_ARM64_PA_BITS_52

	/*

	 * We assume \phys is 64K aligned and this is guaranteed by only

	 * supporting this configuration with 64K pages.

	 */

	orr	\pte, \phys, \phys, lsr #36

	and	\pte, \pte, #PTE_ADDR_MASK

#else

	mov	\pte, \phys

#endif

	.endm



	.macro	pte_to_phys, phys, pte

	.macro	pte_to_phys, phys, pte

#ifdef CONFIG_ARM64_PA_BITS_52

#ifdef CONFIG_ARM64_PA_BITS_52

	ubfiz	\phys, \pte, #(48 - 16 - 12), #16

	ubfiz	\phys, \pte, #(48 - 16 - 12), #16

arch/arm64/kernel/head.S

+2 −22
Original line number Original line Diff line number Diff line
@@ -147,26 +147,6 @@ preserve_boot_args: 
	b	__inval_dcache_area		// tail call

	b	__inval_dcache_area		// tail call

ENDPROC(preserve_boot_args)

ENDPROC(preserve_boot_args)





/*

 * Macro to arrange a physical address in a page table entry, taking care of

 * 52-bit addresses.

 *

 * Preserves:	phys

 * Returns:	pte

 */

	.macro	phys_to_pte, phys, pte

#ifdef CONFIG_ARM64_PA_BITS_52

	/*

	 * We assume \phys is 64K aligned and this is guaranteed by only

	 * supporting this configuration with 64K pages.

	 */

	orr	\pte, \phys, \phys, lsr #36

	and	\pte, \pte, #PTE_ADDR_MASK

#else

	mov	\pte, \phys

#endif

	.endm



/*

/*

 * Macro to create a table entry to the next page.

 * Macro to create a table entry to the next page.

 *

 *
@@ -181,7 +161,7 @@ ENDPROC(preserve_boot_args) 
 */

 */

	.macro	create_table_entry, tbl, virt, shift, ptrs, tmp1, tmp2

	.macro	create_table_entry, tbl, virt, shift, ptrs, tmp1, tmp2

	add	\tmp1, \tbl, #PAGE_SIZE

	add	\tmp1, \tbl, #PAGE_SIZE

	phys_to_pte \tmp1, \tmp2

	phys_to_pte \tmp2, \tmp1

	orr	\tmp2, \tmp2, #PMD_TYPE_TABLE	// address of next table and entry type

	orr	\tmp2, \tmp2, #PMD_TYPE_TABLE	// address of next table and entry type

	lsr	\tmp1, \virt, #\shift

	lsr	\tmp1, \virt, #\shift

	sub	\ptrs, \ptrs, #1

	sub	\ptrs, \ptrs, #1
@@ -207,7 +187,7 @@ ENDPROC(preserve_boot_args) 
 * Returns:	rtbl

 * Returns:	rtbl

 */

 */

	.macro populate_entries, tbl, rtbl, index, eindex, flags, inc, tmp1

	.macro populate_entries, tbl, rtbl, index, eindex, flags, inc, tmp1

.Lpe\@:	phys_to_pte \rtbl, \tmp1

.Lpe\@:	phys_to_pte \tmp1, \rtbl

	orr	\tmp1, \tmp1, \flags	// tmp1 = table entry

	orr	\tmp1, \tmp1, \flags	// tmp1 = table entry

	str	\tmp1, [\tbl, \index, lsl #3]

	str	\tmp1, [\tbl, \index, lsl #3]

	add	\rtbl, \rtbl, \inc	// rtbl = pa next level

	add	\rtbl, \rtbl, \inc	// rtbl = pa next level