Loading arch/x86/kvm/emulate.c +8 −4 Original line number Original line Diff line number Diff line Loading @@ -1324,8 +1324,14 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt, goto load; goto load; } } /* NULL selector is not valid for TR, CS and SS */ rpl = selector & 3; if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR) cpl = ctxt->ops->cpl(ctxt); /* NULL selector is not valid for TR, CS and SS (except for long mode) */ if ((seg == VCPU_SREG_CS || (seg == VCPU_SREG_SS && (ctxt->mode != X86EMUL_MODE_PROT64 || rpl != cpl)) || seg == VCPU_SREG_TR) && null_selector) && null_selector) goto exception; goto exception; Loading @@ -1352,9 +1358,7 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt, goto exception; goto exception; } } rpl = selector & 3; dpl = seg_desc.dpl; dpl = seg_desc.dpl; cpl = ctxt->ops->cpl(ctxt); switch (seg) { switch (seg) { case VCPU_SREG_SS: case VCPU_SREG_SS: Loading Loading
arch/x86/kvm/emulate.c +8 −4 Original line number Original line Diff line number Diff line Loading @@ -1324,8 +1324,14 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt, goto load; goto load; } } /* NULL selector is not valid for TR, CS and SS */ rpl = selector & 3; if ((seg == VCPU_SREG_CS || seg == VCPU_SREG_SS || seg == VCPU_SREG_TR) cpl = ctxt->ops->cpl(ctxt); /* NULL selector is not valid for TR, CS and SS (except for long mode) */ if ((seg == VCPU_SREG_CS || (seg == VCPU_SREG_SS && (ctxt->mode != X86EMUL_MODE_PROT64 || rpl != cpl)) || seg == VCPU_SREG_TR) && null_selector) && null_selector) goto exception; goto exception; Loading @@ -1352,9 +1358,7 @@ static int load_segment_descriptor(struct x86_emulate_ctxt *ctxt, goto exception; goto exception; } } rpl = selector & 3; dpl = seg_desc.dpl; dpl = seg_desc.dpl; cpl = ctxt->ops->cpl(ctxt); switch (seg) { switch (seg) { case VCPU_SREG_SS: case VCPU_SREG_SS: Loading