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Commit 7977ff6e authored by Lutz Ballaschke's avatar Lutz Ballaschke Committed by Wim Van Sebroeck
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watchdog: add f71862fg support 



Watchdog support for Fintek F71862fg Super-I/O added.
Two different hardware reset pins of the F71862fg chip can be configured 
by an additional module parameter.

Signed-off-by: default avatarLutz Ballaschke <vegan.grindcore@googlemail.com>
Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
parent f9a9f096

drivers/watchdog/f71808e_wdt.c

+41 −4
Original line number Original line Diff line number Diff line
@@ -42,6 +42,7 @@ 
#define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */

#define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */

#define SIO_REG_DEVREV		0x22	/* Device revision */

#define SIO_REG_DEVREV		0x22	/* Device revision */

#define SIO_REG_MANID		0x23	/* Fintek ID (2 bytes) */

#define SIO_REG_MANID		0x23	/* Fintek ID (2 bytes) */

#define SIO_REG_ROM_ADDR_SEL	0x27	/* ROM address select */

#define SIO_REG_MFUNCT1		0x29	/* Multi function select 1 */

#define SIO_REG_MFUNCT1		0x29	/* Multi function select 1 */

#define SIO_REG_MFUNCT2		0x2a	/* Multi function select 2 */

#define SIO_REG_MFUNCT2		0x2a	/* Multi function select 2 */

#define SIO_REG_MFUNCT3		0x2b	/* Multi function select 3 */

#define SIO_REG_MFUNCT3		0x2b	/* Multi function select 3 */
@@ -71,6 +72,8 @@ 
#define WATCHDOG_MAX_TIMEOUT	(60 * 255)

#define WATCHDOG_MAX_TIMEOUT	(60 * 255)

#define WATCHDOG_PULSE_WIDTH	125	/* 125 ms, default pulse width for

#define WATCHDOG_PULSE_WIDTH	125	/* 125 ms, default pulse width for

					   watchdog signal */

					   watchdog signal */

#define WATCHDOG_F71862FG_PIN	63	/* default watchdog reset output

					   pin number 63 */





static unsigned short force_id;

static unsigned short force_id;

module_param(force_id, ushort, 0);

module_param(force_id, ushort, 0);
@@ -90,6 +93,12 @@ MODULE_PARM_DESC(pulse_width, 
	"Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"

	"Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"

			" (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");

			" (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");





static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;

module_param(f71862fg_pin, uint, 0);

MODULE_PARM_DESC(f71862fg_pin,

	"Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"

			" (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");



static int nowayout = WATCHDOG_NOWAYOUT;

static int nowayout = WATCHDOG_NOWAYOUT;

module_param(nowayout, bool, 0444);

module_param(nowayout, bool, 0444);

MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");

MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
@@ -283,6 +292,28 @@ static int watchdog_keepalive(void) 
	return err;

	return err;

}

}





static int f71862fg_pin_configure(unsigned short ioaddr)

{

	/* When ioaddr is non-zero the calling function has to take care of

	   mutex handling and superio preparation! */



	if (f71862fg_pin == 63) {

		if (ioaddr) {

			/* SPI must be disabled first to use this pin! */

			superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);

			superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);

		}

	} else if (f71862fg_pin == 56) {

		if (ioaddr)

			superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);

	} else {

		printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n",

				f71862fg_pin);

		return -EINVAL;

	}

	return 0;

}



static int watchdog_start(void)

static int watchdog_start(void)

{

{

	/* Make sure we don't die as soon as the watchdog is enabled below */

	/* Make sure we don't die as soon as the watchdog is enabled below */
@@ -304,6 +335,12 @@ static int watchdog_start(void) 
		superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);

		superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);

		break;

		break;





	case f71862fg:

		err = f71862fg_pin_configure(watchdog.sioaddr);

		if (err)

			goto exit_superio;

		break;



	case f71882fg:

	case f71882fg:

		/* Set pin 56 to WDTRST# */

		/* Set pin 56 to WDTRST# */

		superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);

		superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
@@ -712,16 +749,16 @@ static int __init f71808e_find(int sioaddr) 
	case SIO_F71808_ID:

	case SIO_F71808_ID:

		watchdog.type = f71808fg;

		watchdog.type = f71808fg;

		break;

		break;

	case SIO_F71862_ID:

		watchdog.type = f71862fg;

		err = f71862fg_pin_configure(0); /* validate module parameter */

		break;

	case SIO_F71882_ID:

	case SIO_F71882_ID:

		watchdog.type = f71882fg;

		watchdog.type = f71882fg;

		break;

		break;

	case SIO_F71889_ID:

	case SIO_F71889_ID:

		watchdog.type = f71889fg;

		watchdog.type = f71889fg;

		break;

		break;

	case SIO_F71862_ID:

		/* These have a watchdog, though it isn't implemented (yet). */

		err = -ENOSYS;

		goto exit;

	case SIO_F71858_ID:

	case SIO_F71858_ID:

		/* Confirmed (by datasheet) not to have a watchdog. */

		/* Confirmed (by datasheet) not to have a watchdog. */

		err = -ENODEV;

		err = -ENODEV;