Commit 78ec79bf authored Jul 27, 2016 by Caesar Wang Committed by Jonathan Cameron Aug 23, 2016

arm64: dts: rockchip: add reset saradc node for rk3368 SoCs



SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

parent 543852af

arch/arm64/boot/dts/rockchip/rk3368.dtsi

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -270,6 +270,8 @@
	#io-channel-cells = <1>;		#io-channel-cells = <1>;
	clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
	clock-names = "saradc", "apb_pclk";		clock-names = "saradc", "apb_pclk";
			resets = <&cru SRST_SARADC>;
			reset-names = "saradc-apb";
	status = "disabled";		status = "disabled";
	};		};