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Commit 786e2288 authored by Yijing Wang's avatar Yijing Wang Committed by Jiang Liu
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PCI: Add pcie_flags_reg to cache PCIe capabilities register



Since PCI Express Capabilities Register is read only, cache its value
into struct pci_dev to avoid repeatedly calling pci_read_config_*().

Signed-off-by: default avatarYijing Wang <wangyijing@huawei.com>
Signed-off-by: default avatarJiang Liu <jiang.liu@huawei.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 0d7614f0
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+2 −1
Original line number Diff line number Diff line
@@ -929,7 +929,8 @@ void set_pcie_port_type(struct pci_dev *pdev)
	pdev->is_pcie = 1;
	pdev->pcie_cap = pos;
	pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
	pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
	pdev->pcie_flags_reg = reg16;
	pdev->pcie_type = pci_pcie_type(pdev);
	pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16);
	pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
}
+10 −0
Original line number Diff line number Diff line
@@ -258,6 +258,7 @@ struct pci_dev {
	u8		pcie_mpss:3;	/* PCI-E Max Payload Size Supported */
	u8		rom_base_reg;	/* which config register controls the ROM */
	u8		pin;  		/* which interrupt pin this device uses */
	u16		pcie_flags_reg;	/* cached PCI-E Capabilities Register */

	struct pci_driver *driver;	/* which driver has allocated this device */
	u64		dma_mask;	/* Mask of the bits of bus address this
@@ -1650,6 +1651,15 @@ static inline bool pci_is_pcie(struct pci_dev *dev)
	return !!pci_pcie_cap(dev);
}

/**
 * pci_pcie_type - get the PCIe device/port type
 * @dev: PCI device
 */
static inline int pci_pcie_type(const struct pci_dev *dev)
{
	return (dev->pcie_flags_reg & PCI_EXP_FLAGS_TYPE) >> 4;
}

void pci_request_acs(void);
bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
bool pci_acs_path_enabled(struct pci_dev *start,