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Commit 7381f93a authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'fix-some-bugs-for-HNS3-driver' 



Peng Li says:

====================
fix some bugs for HNS3 driver

This patchset fixes some bugs for HNS3 driver:
[Patch 1/11 - 5/11] fix various bugs reported by hisilicon test team.
[Patch 6/11 - 7/11] fix bugs about interrupt coalescing self-adaptive
function.
[Patch 8/11 - 11/11] fix bugs about ethtool_ops.get_link_ksettings.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 14530746 1931dc20

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+4 −0
Original line number Diff line number Diff line
@@ -411,6 +411,10 @@ struct hnae3_ae_ops { 
				 u32 *flowctrl_adv);

	int (*set_led_id)(struct hnae3_handle *handle,

			  enum ethtool_phys_id_state status);

	void (*get_link_mode)(struct hnae3_handle *handle,

			      unsigned long *supported,

			      unsigned long *advertising);

	void (*get_port_type)(struct hnae3_handle *handle, u8 *port_type);

};



struct hnae3_dcb_ops {

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+63 −17
Original line number Diff line number Diff line
@@ -214,6 +214,7 @@ static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector, 
	/* Default: disable RL */

	h->kinfo.int_rl_setting = 0;



	tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;

	tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;

	tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;

}
@@ -1404,11 +1405,15 @@ static int hns3_vlan_rx_add_vid(struct net_device *netdev, 
				__be16 proto, u16 vid)

{

	struct hnae3_handle *h = hns3_get_handle(netdev);

	struct hns3_nic_priv *priv = netdev_priv(netdev);

	int ret = -EIO;



	if (h->ae_algo->ops->set_vlan_filter)

		ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);



	if (!ret)

		set_bit(vid, priv->active_vlans);



	return ret;

}
@@ -1416,14 +1421,32 @@ static int hns3_vlan_rx_kill_vid(struct net_device *netdev, 
				 __be16 proto, u16 vid)

{

	struct hnae3_handle *h = hns3_get_handle(netdev);

	struct hns3_nic_priv *priv = netdev_priv(netdev);

	int ret = -EIO;



	if (h->ae_algo->ops->set_vlan_filter)

		ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);



	if (!ret)

		clear_bit(vid, priv->active_vlans);



	return ret;

}



static void hns3_restore_vlan(struct net_device *netdev)

{

	struct hns3_nic_priv *priv = netdev_priv(netdev);

	u16 vid;

	int ret;



	for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {

		ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);

		if (ret)

			netdev_warn(netdev, "Restore vlan: %d filter, ret:%d\n",

				    vid, ret);

	}

}



static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,

				u8 qos, __be16 vlan_proto)

{
@@ -2383,15 +2406,15 @@ int hns3_clean_rx_ring( 


static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)

{

#define HNS3_RX_ULTRA_PACKET_RATE 40000

	struct hns3_enet_tqp_vector *tqp_vector =

					ring_group->ring->tqp_vector;

	enum hns3_flow_level_range new_flow_level;

	struct hns3_enet_tqp_vector *tqp_vector;

	int packets_per_secs;

	int bytes_per_usecs;

	int packets_per_msecs;

	int bytes_per_msecs;

	u32 time_passed_ms;

	u16 new_int_gl;

	int usecs;



	if (!ring_group->coal.int_gl)

	if (!ring_group->coal.int_gl || !tqp_vector->last_jiffies)

		return false;



	if (ring_group->total_packets == 0) {
@@ -2408,33 +2431,44 @@ static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group) 
	 */

	new_flow_level = ring_group->coal.flow_level;

	new_int_gl = ring_group->coal.int_gl;

	tqp_vector = ring_group->ring->tqp_vector;

	usecs = (ring_group->coal.int_gl << 1);

	bytes_per_usecs = ring_group->total_bytes / usecs;

	/* 1000000 microseconds */

	packets_per_secs = ring_group->total_packets * 1000000 / usecs;

	time_passed_ms =

		jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);



	if (!time_passed_ms)

		return false;



	do_div(ring_group->total_packets, time_passed_ms);

	packets_per_msecs = ring_group->total_packets;



	do_div(ring_group->total_bytes, time_passed_ms);

	bytes_per_msecs = ring_group->total_bytes;



#define HNS3_RX_LOW_BYTE_RATE 10000

#define HNS3_RX_MID_BYTE_RATE 20000



	switch (new_flow_level) {

	case HNS3_FLOW_LOW:

		if (bytes_per_usecs > 10)

		if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)

			new_flow_level = HNS3_FLOW_MID;

		break;

	case HNS3_FLOW_MID:

		if (bytes_per_usecs > 20)

		if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)

			new_flow_level = HNS3_FLOW_HIGH;

		else if (bytes_per_usecs <= 10)

		else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)

			new_flow_level = HNS3_FLOW_LOW;

		break;

	case HNS3_FLOW_HIGH:

	case HNS3_FLOW_ULTRA:

	default:

		if (bytes_per_usecs <= 20)

		if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)

			new_flow_level = HNS3_FLOW_MID;

		break;

	}



	if ((packets_per_secs > HNS3_RX_ULTRA_PACKET_RATE) &&

	    (&tqp_vector->rx_group == ring_group))

#define HNS3_RX_ULTRA_PACKET_RATE 40



	if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&

	    &tqp_vector->rx_group == ring_group)

		new_flow_level = HNS3_FLOW_ULTRA;



	switch (new_flow_level) {
@@ -2470,6 +2504,11 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector) 
	struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;

	bool rx_update, tx_update;



	if (tqp_vector->int_adapt_down > 0) {

		tqp_vector->int_adapt_down--;

		return;

	}



	if (rx_group->coal.gl_adapt_enable) {

		rx_update = hns3_get_new_int_gl(rx_group);

		if (rx_update)
@@ -2483,6 +2522,9 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector) 
			hns3_set_vector_coalesce_tx_gl(tqp_vector,

						       tx_group->coal.int_gl);

	}



	tqp_vector->last_jiffies = jiffies;

	tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;

}



static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
@@ -3341,6 +3383,10 @@ static int hns3_reset_notify_init_enet(struct hnae3_handle *handle) 
	hns3_nic_set_rx_mode(netdev);

	hns3_recover_hw_addr(netdev);



	/* Hardware table is only clear when pf resets */

	if (!(handle->flags & HNAE3_SUPPORT_VF))

		hns3_restore_vlan(netdev);



	/* Carrier off reporting is important to ethtool even BEFORE open */

	netif_carrier_off(netdev);

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

+6 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ 
#ifndef __HNS3_ENET_H

#define __HNS3_ENET_H



#include <linux/if_vlan.h>



#include "hnae3.h"



extern const char hns3_driver_version[];
@@ -460,6 +462,8 @@ enum hns3_link_mode_bits { 
#define HNS3_INT_RL_MAX			0x00EC

#define HNS3_INT_RL_ENABLE_MASK		0x40



#define HNS3_INT_ADAPT_DOWN_START	100



struct hns3_enet_coalesce {

	u16 int_gl;

	u8 gl_adapt_enable;
@@ -495,6 +499,7 @@ struct hns3_enet_tqp_vector { 


	/* when 0 should adjust interrupt coalesce parameter */

	u8 int_adapt_down;

	unsigned long last_jiffies;

} ____cacheline_internodealigned_in_smp;



enum hns3_udp_tnl_type {
@@ -539,6 +544,7 @@ struct hns3_nic_priv { 
	struct notifier_block notifier_block;

	/* Vxlan/Geneve information */

	struct hns3_udp_tunnel udp_tnl[HNS3_UDP_TNL_MAX];

	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];

};



union l3_hdr_info {

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+16 −91
Original line number Diff line number Diff line
@@ -74,19 +74,6 @@ struct hns3_link_mode_mapping { 
	u32 ethtool_link_mode;

};



static const struct hns3_link_mode_mapping hns3_lm_map[] = {

	{HNS3_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},

	{HNS3_LM_AUTONEG_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},

	{HNS3_LM_TP_BIT, ETHTOOL_LINK_MODE_TP_BIT},

	{HNS3_LM_PAUSE_BIT, ETHTOOL_LINK_MODE_Pause_BIT},

	{HNS3_LM_BACKPLANE_BIT, ETHTOOL_LINK_MODE_Backplane_BIT},

	{HNS3_LM_10BASET_HALF_BIT, ETHTOOL_LINK_MODE_10baseT_Half_BIT},

	{HNS3_LM_10BASET_FULL_BIT, ETHTOOL_LINK_MODE_10baseT_Full_BIT},

	{HNS3_LM_100BASET_HALF_BIT, ETHTOOL_LINK_MODE_100baseT_Half_BIT},

	{HNS3_LM_100BASET_FULL_BIT, ETHTOOL_LINK_MODE_100baseT_Full_BIT},

	{HNS3_LM_1000BASET_FULL_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},

};



static int hns3_lp_setup(struct net_device *ndev, enum hnae3_loop loop)

{

	struct hnae3_handle *h = hns3_get_handle(ndev);
@@ -365,24 +352,6 @@ static void hns3_self_test(struct net_device *ndev, 
		dev_open(ndev);

}



static void hns3_driv_to_eth_caps(u32 caps, struct ethtool_link_ksettings *cmd,

				  bool is_advertised)

{

	int i;



	for (i = 0; i < ARRAY_SIZE(hns3_lm_map); i++) {

		if (!(caps & hns3_lm_map[i].hns3_link_mode))

			continue;



		if (is_advertised)

			__set_bit(hns3_lm_map[i].ethtool_link_mode,

				  cmd->link_modes.advertising);

		else

			__set_bit(hns3_lm_map[i].ethtool_link_mode,

				  cmd->link_modes.supported);

	}

}



static int hns3_get_sset_count(struct net_device *netdev, int stringset)

{

	struct hnae3_handle *h = hns3_get_handle(netdev);
@@ -594,18 +563,19 @@ static int hns3_get_link_ksettings(struct net_device *netdev, 
{

	struct hnae3_handle *h = hns3_get_handle(netdev);

	u32 flowctrl_adv = 0;

	u32 supported_caps;

	u32 advertised_caps;

	u8 media_type = HNAE3_MEDIA_TYPE_UNKNOWN;

	u8 link_stat;



	if (!h->ae_algo || !h->ae_algo->ops)

		return -EOPNOTSUPP;



	/* 1.auto_neg & speed & duplex from cmd */

	if (netdev->phydev)

	if (netdev->phydev) {

		phy_ethtool_ksettings_get(netdev->phydev, cmd);

	else if (h->ae_algo->ops->get_ksettings_an_result)



		return 0;

	}



	if (h->ae_algo->ops->get_ksettings_an_result)

		h->ae_algo->ops->get_ksettings_an_result(h,

							 &cmd->base.autoneg,

							 &cmd->base.speed,
@@ -619,62 +589,16 @@ static int hns3_get_link_ksettings(struct net_device *netdev, 
		cmd->base.duplex = DUPLEX_UNKNOWN;

	}



	/* 2.media_type get from bios parameter block */

	if (h->ae_algo->ops->get_media_type) {

		h->ae_algo->ops->get_media_type(h, &media_type);



		switch (media_type) {

		case HNAE3_MEDIA_TYPE_FIBER:

			cmd->base.port = PORT_FIBRE;

			supported_caps = HNS3_LM_FIBRE_BIT |

					 HNS3_LM_AUTONEG_BIT |

					 HNS3_LM_PAUSE_BIT |

					 HNS3_LM_1000BASET_FULL_BIT;

	/* 2.get link mode and port type*/

	if (h->ae_algo->ops->get_link_mode)

		h->ae_algo->ops->get_link_mode(h,

					       cmd->link_modes.supported,

					       cmd->link_modes.advertising);



			advertised_caps = supported_caps;

			break;

		case HNAE3_MEDIA_TYPE_COPPER:

			cmd->base.port = PORT_TP;

			supported_caps = HNS3_LM_TP_BIT |

					 HNS3_LM_AUTONEG_BIT |

					 HNS3_LM_PAUSE_BIT |

					 HNS3_LM_1000BASET_FULL_BIT |

					 HNS3_LM_100BASET_FULL_BIT |

					 HNS3_LM_100BASET_HALF_BIT |

					 HNS3_LM_10BASET_FULL_BIT |

					 HNS3_LM_10BASET_HALF_BIT;

			advertised_caps = supported_caps;

			break;

		case HNAE3_MEDIA_TYPE_BACKPLANE:

	cmd->base.port = PORT_NONE;

			supported_caps = HNS3_LM_BACKPLANE_BIT |

					 HNS3_LM_PAUSE_BIT |

					 HNS3_LM_AUTONEG_BIT |

					 HNS3_LM_1000BASET_FULL_BIT |

					 HNS3_LM_100BASET_FULL_BIT |

					 HNS3_LM_100BASET_HALF_BIT |

					 HNS3_LM_10BASET_FULL_BIT |

					 HNS3_LM_10BASET_HALF_BIT;



			advertised_caps = supported_caps;

			break;

		case HNAE3_MEDIA_TYPE_UNKNOWN:

		default:

			cmd->base.port = PORT_OTHER;

			supported_caps = 0;

			advertised_caps = 0;

			break;

		}



		if (!cmd->base.autoneg)

			advertised_caps &= ~HNS3_LM_AUTONEG_BIT;



		advertised_caps &= ~HNS3_LM_PAUSE_BIT;



		/* now, map driver link modes to ethtool link modes */

		hns3_driv_to_eth_caps(supported_caps, cmd, false);

		hns3_driv_to_eth_caps(advertised_caps, cmd, true);

	}

	if (h->ae_algo->ops->get_port_type)

		h->ae_algo->ops->get_port_type(h,

					       &cmd->base.port);



	/* 3.mdix_ctrl&mdix get from phy reg */

	if (h->ae_algo->ops->get_mdix_mode)
@@ -1133,6 +1057,7 @@ static const struct ethtool_ops hns3vf_ethtool_ops = { 
	.get_channels = hns3_get_channels,

	.get_coalesce = hns3_get_coalesce,

	.set_coalesce = hns3_set_coalesce,

	.get_link = hns3_get_link,

};



static const struct ethtool_ops hns3_ethtool_ops = {

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

+3 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ 
#include <linux/types.h>

#include <linux/io.h>



#define HCLGE_CMDQ_TX_TIMEOUT		1000

#define HCLGE_CMDQ_TX_TIMEOUT		30000



struct hclge_dev;

struct hclge_desc {
@@ -414,6 +414,8 @@ struct hclge_pf_res_cmd { 
#define HCLGE_CFG_DEFAULT_SPEED_M	GENMASK(23, 16)

#define HCLGE_CFG_RSS_SIZE_S	24

#define HCLGE_CFG_RSS_SIZE_M	GENMASK(31, 24)

#define HCLGE_CFG_SPEED_ABILITY_S	0

#define HCLGE_CFG_SPEED_ABILITY_M	GENMASK(7, 0)



struct hclge_cfg_param_cmd {

	__le32 offset;