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Commit 72edd83c authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/radeon: fix PLLs on RS880 and older v2 

This is a workaround for RS880 and older chips which seem to have
an additional limit on the minimum PLL input frequency.

v2: fix signed/unsigned warning

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=91861
https://bugzilla.kernel.org/show_bug.cgi?id=83461



Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent a78b80f5

drivers/gpu/drm/radeon/radeon_display.c

+3 −0
Original line number Diff line number Diff line
@@ -960,6 +960,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, 
	if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV &&

	    pll->flags & RADEON_PLL_USE_REF_DIV)

		ref_div_max = pll->reference_div;

	else if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP)

		/* fix for problems on RS880 */

		ref_div_max = min(pll->max_ref_div, 7u);

	else

		ref_div_max = pll->max_ref_div;