Commit 729e5522 authored Feb 06, 2017 by Ding Tianhong Committed by Daniel Lezcano Feb 08, 2017

clocksource/drivers/arm_arch_timer: Add dt binding for hisilicon-161010101 erratum



This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward.  So, describe it
in the device tree.

Signed-off-by: Ding Tianhong <dingtianhong@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

parent fb6002a8

Documentation/devicetree/bindings/arm/arch_timer.txt

+6 −0

Original line number	Diff line number	Diff line
		@@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
		This also affects writes to the tval register, due to the implicit
		counter read.

		- hisilicon,erratum-161010101 : A boolean property. Indicates the
		presence of Hisilicon erratum 161010101, which says that reading the
		counters is unreliable in some cases, and reads may return a value 32
		beyond the correct value. This also affects writes to the tval
		registers, due to the implicit counter read.

		** Optional properties:

		- arm,cpu-registers-not-fw-configured : Firmware does not initialize