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Commit 724f24ee authored by Antoine Tenart's avatar Antoine Tenart Committed by Tejun Heo
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Documentation: bindings: document the sub-nodes AHCI bindings 



The libahci now allows to use multiple PHYs and to represent each port
as a sub-node. Add these bindings to the documentation.

Signed-off-by: default avatarAntoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent 30f3c73c

Documentation/devicetree/bindings/ata/ahci-platform.txt

+41 −0
Original line number Diff line number Diff line
@@ -3,6 +3,10 @@ 
SATA nodes are defined to describe on-chip Serial ATA controllers.

Each SATA controller should have its own node.



It is possible, but not required, to represent each port as a sub-node.

It allows to enable each port independently when dealing with multiple

PHYs.



Required properties:

- compatible        : compatible string, one of:

  - "allwinner,sun4i-a10-ahci"
@@ -12,13 +16,30 @@ Required properties: 
  - "snps,dwc-ahci"

  - "snps,exynos5440-ahci"

  - "snps,spear-ahci"

  - "generic-ahci"

- interrupts        : <interrupt mapping for SATA IRQ>

- reg               : <registers mapping>



Please note that when using "generic-ahci" you must also specify a SoC specific

compatible:

	compatible = "manufacturer,soc-model-ahci", "generic-ahci";



Optional properties:

- dma-coherent      : Present if dma operations are coherent

- clocks            : a list of phandle + clock specifier pairs

- target-supply     : regulator for SATA target power

- phys              : reference to the SATA PHY node

- phy-names         : must be "sata-phy"



Required properties when using sub-nodes:

- #address-cells    : number of cells to encode an address

- #size-cells       : number of cells representing the size of an address





Sub-nodes required properties:

- reg               : the port number

- phys              : reference to the SATA PHY node





Examples:

        sata@ffe08000 {
@@ -34,3 +55,23 @@ Examples: 
		clocks = <&pll6 0>, <&ahb_gates 25>;

		target-supply = <&reg_ahci_5v>;

	};



With sub-nodes:

	sata@f7e90000 {

		compatible = "marvell,berlin2q-achi", "generic-ahci";

		reg = <0xe90000 0x1000>;

		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&chip CLKID_SATA>;

		#address-cells = <1>;

		#size-cells = <0>;



		sata0: sata-port@0 {

			reg = <0>;

			phys = <&sata_phy 0>;

		};



		sata1: sata-port@1 {

			reg = <1>;

			phys = <&sata_phy 1>;

		};

	};