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Commit 70b13d51 authored by Dave Airlie's avatar Dave Airlie
Browse files

drm/r500: add support for AGP based cards. 



AGP registers weren't programmed properly for r500 cards.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 9156cf09

drivers/char/drm/radeon_cp.c

+23 −3
Original line number Original line Diff line number Diff line
@@ -113,6 +113,27 @@ static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_lo 
		RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);

		RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);

}

}





static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)

{

	u32 agp_base_hi = upper_32_bits(agp_base);

	u32 agp_base_lo = agp_base & 0xffffffff;



	if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {

		R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);

		R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);

	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {

		RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);

		RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);

	} else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {

		R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);

		R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);

	} else {

		RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);

		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R200)

			RADEON_WRITE(RADEON_AGP_BASE_2, agp_base_hi);

	}

}



static int RADEON_READ_PLL(struct drm_device * dev, int addr)

static int RADEON_READ_PLL(struct drm_device * dev, int addr)

{

{

	drm_radeon_private_t *dev_priv = dev->dev_private;

	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -542,9 +563,8 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev, 




#if __OS_HAS_AGP

#if __OS_HAS_AGP

	if (dev_priv->flags & RADEON_IS_AGP) {

	if (dev_priv->flags & RADEON_IS_AGP) {

		RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);

		radeon_write_agp_base(dev_priv, dev->agp->base);

		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R200)



			RADEON_WRITE(RADEON_AGP_BASE_2, 0);

		radeon_write_agp_location(dev_priv,

		radeon_write_agp_location(dev_priv,

			     (((dev_priv->gart_vm_start - 1 +

			     (((dev_priv->gart_vm_start - 1 +

				dev_priv->gart_size) & 0xffff0000) |

				dev_priv->gart_size) & 0xffff0000) |

drivers/char/drm/radeon_drv.h

+4 −0
Original line number Original line Diff line number Diff line
@@ -522,9 +522,13 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev, 




#define RV515_MC_FB_LOCATION 0x01

#define RV515_MC_FB_LOCATION 0x01

#define RV515_MC_AGP_LOCATION 0x02

#define RV515_MC_AGP_LOCATION 0x02

#define RV515_MC_AGP_BASE     0x03

#define RV515_MC_AGP_BASE_2   0x04





#define R520_MC_FB_LOCATION 0x04

#define R520_MC_FB_LOCATION 0x04

#define R520_MC_AGP_LOCATION 0x05

#define R520_MC_AGP_LOCATION 0x05

#define R520_MC_AGP_BASE     0x06

#define R520_MC_AGP_BASE_2   0x07





#define RADEON_MPP_TB_CONFIG		0x01c0

#define RADEON_MPP_TB_CONFIG		0x01c0

#define RADEON_MEM_CNTL			0x0140

#define RADEON_MEM_CNTL			0x0140