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Commit 70896650 authored by Kefeng Wang's avatar Kefeng Wang Committed by Wei Xu
Browse files

arm64: dts: hip05: fix its node without msi-cells 



Fix commit abf9c25d ("arm64: dts: hip05: Append all gicv3 ITS
entries"), it forgets the property msi-cell, see arm,gic-v3.txt.

Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent f55532a0

arch/arm64/boot/dts/hisilicon/hip05.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -249,24 +249,28 @@ 
		its_peri: interrupt-controller@8c000000 {

			compatible = "arm,gic-v3-its";

			msi-controller;

			#msi-cells = <1>;

			reg = <0x0 0x8c000000 0x0 0x40000>;

		};



		its_m3: interrupt-controller@a3000000 {

			compatible = "arm,gic-v3-its";

			msi-controller;

			#msi-cells = <1>;

			reg = <0x0 0xa3000000 0x0 0x40000>;

		};



		its_pcie: interrupt-controller@b7000000 {

			compatible = "arm,gic-v3-its";

			msi-controller;

			#msi-cells = <1>;

			reg = <0x0 0xb7000000 0x0 0x40000>;

		};



		its_dsa: interrupt-controller@c6000000 {

			compatible = "arm,gic-v3-its";

			msi-controller;

			#msi-cells = <1>;

			reg = <0x0 0xc6000000 0x0 0x40000>;

		};

	};