Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 704fc59e authored by Siddha, Suresh B's avatar Siddha, Suresh B Committed by Linus Torvalds
Browse files

[PATCH] x86_64: fix apic error on bootup 



Appended patch fixes the "APIC error on CPUX: 00(40)" observed during bootup.

From SDM Vol-3A "Valid Interrupt Vectors" section:
	"When an illegal vector value (0-15) is written to an LVT entry
	and the delivery mode is Fixed, the APIC may signal an illegal
	vector error, with out regard to whether the mask bit is set
	or whether an interrupt is actually seen on input."

Signed-off-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 03fdc2c2

arch/i386/kernel/apic.c

+13 −2
Original line number Diff line number Diff line
@@ -157,7 +157,7 @@ void clear_local_APIC(void) 
	maxlvt = get_maxlvt();



	/*

	 * Masking an LVT entry on a P6 can trigger a local APIC error

	 * Masking an LVT entry can trigger a local APIC error

	 * if the vector is zero. Mask LVTERR first to prevent this.

	 */

	if (maxlvt >= 3) {
@@ -1118,7 +1118,18 @@ void disable_APIC_timer(void) 
		unsigned long v;



		v = apic_read(APIC_LVTT);

		apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);

		/*

		 * When an illegal vector value (0-15) is written to an LVT

		 * entry and delivery mode is Fixed, the APIC may signal an

		 * illegal vector error, with out regard to whether the mask

		 * bit is set or whether an interrupt is actually seen on input.

		 *

		 * Boot sequence might call this function when the LVTT has

		 * '0' vector value. So make sure vector field is set to

		 * valid value.

		 */

		v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);

		apic_write_around(APIC_LVTT, v);

	}

}

arch/x86_64/kernel/apic.c

+13 −2
Original line number Diff line number Diff line
@@ -100,7 +100,7 @@ void clear_local_APIC(void) 
	maxlvt = get_maxlvt();



	/*

	 * Masking an LVT entry on a P6 can trigger a local APIC error

	 * Masking an LVT entry can trigger a local APIC error

	 * if the vector is zero. Mask LVTERR first to prevent this.

	 */

	if (maxlvt >= 3) {
@@ -851,7 +851,18 @@ void disable_APIC_timer(void) 
		unsigned long v;



		v = apic_read(APIC_LVTT);

		apic_write(APIC_LVTT, v | APIC_LVT_MASKED);

		/*

		 * When an illegal vector value (0-15) is written to an LVT

		 * entry and delivery mode is Fixed, the APIC may signal an

		 * illegal vector error, with out regard to whether the mask

		 * bit is set or whether an interrupt is actually seen on input.

		 *

		 * Boot sequence might call this function when the LVTT has

		 * '0' vector value. So make sure vector field is set to

		 * valid value.

		 */

		v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);

		apic_write(APIC_LVTT, v);

	}

}