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Commit 701c5e73 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Greg Kroah-Hartman
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serial: 8250_dw: add fractional divisor support 



For Synopsys DesignWare 8250 uart which version >= 4.00a, there's a
valid divisor latch fraction register. The fractional divisor width is
4bits ~ 6bits.

Now the preparation is done, it's easy to add the feature support.
This patch firstly tries to get the fractional divisor width during
probe, then setups dw specific get_divisor() and set_divisor() hook.

Signed-off-by: default avatarJisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 6226e5f3

drivers/tty/serial/8250/8250_dw.c

+45 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 


/* Offsets for the DesignWare specific registers */

#define DW_UART_USR	0x1f /* UART Status Register */

#define DW_UART_DLF	0xc0 /* Divisor Latch Fraction Register */

#define DW_UART_CPR	0xf4 /* Component Parameter Register */

#define DW_UART_UCV	0xf8 /* UART Component Version */
@@ -55,6 +56,7 @@ 


struct dw8250_data {

	u8			usr_reg;

	u8			dlf_size;

	int			line;

	int			msr_mask_on;

	int			msr_mask_off;
@@ -366,6 +368,37 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) 
	return param == chan->device->dev->parent;

}



/*

 * divisor = div(I) + div(F)

 * "I" means integer, "F" means fractional

 * quot = div(I) = clk / (16 * baud)

 * frac = div(F) * 2^dlf_size

 *

 * let rem = clk % (16 * baud)

 * we have: div(F) * (16 * baud) = rem

 * so frac = 2^dlf_size * rem / (16 * baud) = (rem << dlf_size) / (16 * baud)

 */

static unsigned int dw8250_get_divisor(struct uart_port *p,

				       unsigned int baud,

				       unsigned int *frac)

{

	unsigned int quot, rem, base_baud = baud * 16;

	struct dw8250_data *d = p->private_data;



	quot = p->uartclk / base_baud;

	rem = p->uartclk % base_baud;

	*frac = DIV_ROUND_CLOSEST(rem << d->dlf_size, base_baud);



	return quot;

}



static void dw8250_set_divisor(struct uart_port *p, unsigned int baud,

			       unsigned int quot, unsigned int quot_frac)

{

	dw8250_writel_ext(p, DW_UART_DLF, quot_frac);

	serial8250_do_set_divisor(p, baud, quot, quot_frac);

}



static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)

{

	if (p->dev->of_node) {
@@ -426,6 +459,18 @@ static void dw8250_setup_port(struct uart_port *p) 
	dev_dbg(p->dev, "Designware UART version %c.%c%c\n",

		(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);



	dw8250_writel_ext(p, DW_UART_DLF, ~0U);

	reg = dw8250_readl_ext(p, DW_UART_DLF);

	dw8250_writel_ext(p, DW_UART_DLF, 0);



	if (reg) {

		struct dw8250_data *d = p->private_data;



		d->dlf_size = fls(reg);

		p->get_divisor = dw8250_get_divisor;

		p->set_divisor = dw8250_set_divisor;

	}



	reg = dw8250_readl_ext(p, DW_UART_CPR);

	if (!reg)

		return;