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Commit 6ff4d3e9 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Michael Ellerman
Browse files

powerpc: Remove old unused icswx based coprocessor support



We have a whole pile of unused code to maintain the ACOP register,
allocate coprocessor PIDs and handle ACOP faults. This mechanism
was used for the HFI adapter on POWER7 which is dead and gone and
whose driver never went upstream. It was used on some A2 core based
stuff that also never saw the light of day.

Take out all that code.

There is still some POWER8 coprocessor code that uses icswx but it's
kernel only and thus doesn't use any of that infrastructure.

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 8f5ca0b3
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+0 −5
Original line number Diff line number Diff line
@@ -96,11 +96,6 @@ typedef struct {
#ifdef CONFIG_PPC_SUBPAGE_PROT
	struct subpage_prot_table spt;
#endif /* CONFIG_PPC_SUBPAGE_PROT */
#ifdef CONFIG_PPC_ICSWX
	struct spinlock *cop_lockp; /* guard acop and cop_pid */
	unsigned long acop;	/* mask of enabled coprocessor types */
	unsigned int cop_pid;	/* pid value used with coprocessors */
#endif /* CONFIG_PPC_ICSWX */
#ifdef CONFIG_PPC_64K_PAGES
	/* for 4K PTE fragment support */
	void *pte_frag;
+0 −6
Original line number Diff line number Diff line
@@ -96,12 +96,6 @@ static inline void switch_mm_irqs_off(struct mm_struct *prev,
	if (prev == next)
		return;

#ifdef CONFIG_PPC_ICSWX
	/* Switch coprocessor context only if prev or next uses a coprocessor */
	if (prev->context.acop || next->context.acop)
		switch_cop(next);
#endif /* CONFIG_PPC_ICSWX */

	/* We must stop all altivec streams before changing the HW
	 * context
	 */
+0 −3
Original line number Diff line number Diff line
@@ -221,10 +221,7 @@
#define SPRN_CSRR0	SPRN_SRR2 /* Critical Save and Restore Register 0 */
#define SPRN_CSRR1	SPRN_SRR3 /* Critical Save and Restore Register 1 */
#endif

#ifdef CONFIG_PPC_ICSWX
#define SPRN_HACOP	0x15F	/* Hypervisor Available Coprocessor Register */
#endif

/* Bit definitions for CCR1. */
#define	CCR1_DPC	0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
+0 −2
Original line number Diff line number Diff line
@@ -22,8 +22,6 @@ ifeq ($(CONFIG_PPC_STD_MMU_64),y)
obj-$(CONFIG_PPC_4K_PAGES)	+= hash64_4k.o
obj-$(CONFIG_PPC_64K_PAGES)	+= hash64_64k.o
endif
obj-$(CONFIG_PPC_ICSWX)		+= icswx.o
obj-$(CONFIG_PPC_ICSWX_PID)	+= icswx_pid.o
obj-$(CONFIG_40x)		+= 40x_mmu.o
obj-$(CONFIG_44x)		+= 44x_mmu.o
obj-$(CONFIG_PPC_8xx)		+= 8xx_mmu.o
+0 −15
Original line number Diff line number Diff line
@@ -45,8 +45,6 @@
#include <asm/siginfo.h>
#include <asm/debug.h>

#include "icswx.h"

static inline bool notify_page_fault(struct pt_regs *regs)
{
	bool ret = false;
@@ -389,19 +387,6 @@ static int __do_page_fault(struct pt_regs *regs, unsigned long address,
	int fault, major = 0;
	bool store_update_sp = false;

#ifdef CONFIG_PPC_ICSWX
	/*
	 * we need to do this early because this "data storage
	 * interrupt" does not update the DAR/DEAR so we don't want to
	 * look at it
	 */
	if (error_code & ICSWX_DSI_UCT) {
		int rc = acop_handle_fault(regs, address, error_code);
		if (rc)
			return rc;
	}
#endif /* CONFIG_PPC_ICSWX */

	if (notify_page_fault(regs))
		return 0;

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