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Commit 6fca1e17 authored by Russell King's avatar Russell King
Browse files

ARM: restart: footbridge: use new restart hook 



Hook these platforms restart code into the new restart hook rather
than using arch_reset().

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 9eb48595

arch/arm/mach-footbridge/cats-hw.c

+1 −0
Original line number Diff line number Diff line
@@ -91,4 +91,5 @@ MACHINE_START(CATS, "Chalice-CATS") 
	.map_io		= footbridge_map_io,

	.init_irq	= footbridge_init_irq,

	.timer		= &isa_timer,

	.restart	= footbridge_restart,

MACHINE_END

arch/arm/mach-footbridge/common.c

+27 −0
Original line number Diff line number Diff line
@@ -199,6 +199,33 @@ void __init footbridge_map_io(void) 
		iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));

}



void footbridge_restart(char mode, const char *cmd)

{

	if (mode == 's') {

		/* Jump into the ROM */

		soft_restart(0x41000000);

	} else {

		/*

		 * Force the watchdog to do a CPU reset.

		 *

		 * After making sure that the watchdog is disabled

		 * (so we can change the timer registers) we first

		 * enable the timer to autoreload itself.  Next, the

		 * timer interval is set really short and any

		 * current interrupt request is cleared (so we can

		 * see an edge transition).  Finally, TIMER4 is

		 * enabled as the watchdog.

		 */

		*CSR_SA110_CNTL &= ~(1 << 13);

		*CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |

				   TIMER_CNTL_AUTORELOAD |

				   TIMER_CNTL_DIV16;

		*CSR_TIMER4_LOAD = 0x2;

		*CSR_TIMER4_CLR  = 0;

		*CSR_SA110_CNTL |= (1 << 13);

	}

}



#ifdef CONFIG_FOOTBRIDGE_ADDIN



static inline unsigned long fb_bus_sdram_offset(void)

arch/arm/mach-footbridge/common.h

+1 −0
Original line number Diff line number Diff line
@@ -8,3 +8,4 @@ extern void footbridge_map_io(void); 
extern void footbridge_init_irq(void);



extern void isa_init_irq(unsigned int irq);

extern void footbridge_restart(char, const char *);

arch/arm/mach-footbridge/ebsa285.c

+1 −0
Original line number Diff line number Diff line
@@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285") 
	.map_io		= footbridge_map_io,

	.init_irq	= footbridge_init_irq,

	.timer		= &footbridge_timer,

	.restart	= footbridge_restart,

MACHINE_END

arch/arm/mach-footbridge/include/mach/system.h

+0 −52
Original line number Diff line number Diff line
@@ -7,12 +7,6 @@ 
 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#include <linux/io.h>

#include <asm/hardware/dec21285.h>

#include <mach/hardware.h>

#include <asm/leds.h>

#include <asm/mach-types.h>



static inline void arch_idle(void)

{

	cpu_do_idle();
@@ -20,50 +14,4 @@ static inline void arch_idle(void) 


static inline void arch_reset(char mode, const char *cmd)

{

	if (mode == 's') {

		/*

		 * Jump into the ROM

		 */

		soft_restart(0x41000000);

	} else {

		if (machine_is_netwinder()) {

			/* open up the SuperIO chip

			 */

			outb(0x87, 0x370);

			outb(0x87, 0x370);



			/* aux function group 1 (logical device 7)

			 */

			outb(0x07, 0x370);

			outb(0x07, 0x371);



			/* set GP16 for WD-TIMER output

			 */

			outb(0xe6, 0x370);

			outb(0x00, 0x371);



			/* set a RED LED and toggle WD_TIMER for rebooting

			 */

			outb(0xc4, 0x338);

		} else {

			/* 

			 * Force the watchdog to do a CPU reset.

			 *

			 * After making sure that the watchdog is disabled

			 * (so we can change the timer registers) we first

			 * enable the timer to autoreload itself.  Next, the

			 * timer interval is set really short and any

			 * current interrupt request is cleared (so we can

			 * see an edge transition).  Finally, TIMER4 is

			 * enabled as the watchdog.

			 */

			*CSR_SA110_CNTL &= ~(1 << 13);

			*CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |

					   TIMER_CNTL_AUTORELOAD |

					   TIMER_CNTL_DIV16;

			*CSR_TIMER4_LOAD = 0x2;

			*CSR_TIMER4_CLR  = 0;

			*CSR_SA110_CNTL |= (1 << 13);

		}

	}

}