Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6fb16700 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

[media] mt2063: make checkpatch.pl happy 



Fix everything but 80 columns and two msleep warnings

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent e3f94fb8

drivers/media/common/tuners/mt2063.c

+48 −81
Original line number Diff line number Diff line
@@ -263,7 +263,7 @@ static u32 mt2063_write(struct mt2063_state *state, u8 reg, u8 *data, u32 len) 
	fe->ops.i2c_gate_ctrl(fe, 0);



	if (ret < 0)

		printk("mt2063_writeregs error ret=%d\n", ret);

		printk(KERN_ERR "%s error ret=%d\n", __func__, ret);



	return ret;

}
@@ -287,7 +287,6 @@ static u32 mt2063_setreg(struct mt2063_state *state, u8 reg, u8 val) 
	return 0;

}





/*

 * mt2063_read - Read data from the I2C bus

 */
@@ -322,7 +321,7 @@ static u32 mt2063_read(struct mt2063_state *state, 
			break;

	}

	fe->ops.i2c_gate_ctrl(fe, 0);

	return (status);

	return status;

}



/*
@@ -600,10 +599,6 @@ static u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info) 
		    ((f_Desired - pAS_Info->f_if1_Center +

		      f_Step / 2) / f_Step);



	//assert;

	//if (!abs((s32) f_Center - (s32) pAS_Info->f_if1_Center) <= (s32) (f_Step/2))

	//          return 0;



	/*  Take MT_ExclZones, center around f_Center and change the resolution to f_Step  */

	while (pNode != NULL) {

		/*  floor function  */
@@ -625,10 +620,6 @@ static u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info) 
			zones[j - 1].max_ = tmpMax;

		else {

			/*  Add new zone  */

			//assert(j<MT2063_MAX_ZONES);

			//if (j>=MT2063_MAX_ZONES)

			//break;



			zones[j].min_ = tmpMin;

			zones[j].max_ = tmpMax;

			j++;
@@ -903,15 +894,13 @@ static u32 MT2063_AvoidSpurs(struct MT2063_AvoidSpursData_t *pAS_Info) 
				delta_IF1 = zfIF1 - pAS_Info->f_if1_Center;

			else

				delta_IF1 = pAS_Info->f_if1_Center - zfIF1;

		}



			pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);

		/*

		 **  Continue while the new 1st IF is still within the 1st IF bandwidth

		 **  and there is a spur in the band (again)

		 */

		while ((2 * delta_IF1 + pAS_Info->f_out_bw <=

			pAS_Info->f_if1_bw)

		       && (pAS_Info->bSpurPresent =

			   IsSpurInBand(pAS_Info, &fm, &fp)));

		} while ((2 * delta_IF1 + pAS_Info->f_out_bw <= pAS_Info->f_if1_bw) && pAS_Info->bSpurPresent);



		/*

		 ** Use the LO-spur free values found.  If the search went all the way to
@@ -930,19 +919,9 @@ static u32 MT2063_AvoidSpurs(struct MT2063_AvoidSpursData_t *pAS_Info) 
	    ((pAS_Info->

	      nSpursFound << MT2063_SPUR_SHIFT) & MT2063_SPUR_CNT_MASK);



	return (status);

	return status;

}



/*

**  The expected version of MT_AvoidSpursData_t

**  If the version is different, an updated file is needed from Microtune

*/



typedef enum {

	MT2063_SET_ATTEN,

	MT2063_INCR_ATTEN,

	MT2063_DECR_ATTEN

} MT2063_ATTEN_CNTL_MODE;



/*

 * Constants used by the tuning algorithm
@@ -1044,8 +1023,7 @@ unsigned int mt2063_lockStatus(struct mt2063_state *state) 
			return TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO;

		}

		msleep(nPollRate);	/*  Wait between retries  */

	}

	while (++nDelays < nMaxLoops);

	} while (++nDelays < nMaxLoops);



	/*

	 * Got no lock or partial lock
@@ -1201,7 +1179,7 @@ static u32 mt2063_set_dnc_output_enable(struct mt2063_state *state, 
		break;

	}



	return (status);

	return status;

}



/******************************************************************************
@@ -1304,18 +1282,16 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state, 
		     reg[MT2063_REG_PD1_TGT] & (u8) ~0x40) | (RFAGCEN[Mode]

								   ? 0x40 :

								   0x00);

		if (state->reg[MT2063_REG_PD1_TGT] != val) {

		if (state->reg[MT2063_REG_PD1_TGT] != val)

			status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);

	}

	}



	/* LNARin */

	if (status >= 0) {

		u8 val = (state->reg[MT2063_REG_CTRL_2C] & (u8) ~0x03) |

			 (LNARIN[Mode] & 0x03);

		if (state->reg[MT2063_REG_CTRL_2C] != val)

			status |= mt2063_setreg(state, MT2063_REG_CTRL_2C,

					  val);

			status |= mt2063_setreg(state, MT2063_REG_CTRL_2C, val);

	}



	/* FIFFQEN and FIFFQ */
@@ -1383,10 +1359,9 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state, 
			val = 5;

		val = (state->reg[MT2063_REG_FIF_OV] & (u8) ~0x1F) |

		      (val & 0x1F);

		if (state->reg[MT2063_REG_FIF_OV] != val) {

		if (state->reg[MT2063_REG_FIF_OV] != val)

			status |= mt2063_setreg(state, MT2063_REG_FIF_OV, val);

	}

	}



	/* PD2TGT */

	if (status >= 0) {
@@ -1398,31 +1373,24 @@ static u32 MT2063_SetReceiverMode(struct mt2063_state *state, 


	/* Ignore ATN Overload */

	if (status >= 0) {

		val =

		    (state->

		     reg[MT2063_REG_LNA_TGT] & (u8) ~ 0x80) | (RFOVDIS[Mode]

								   ? 0x80 :

								   0x00);

		if (state->reg[MT2063_REG_LNA_TGT] != val) {

		val = (state->reg[MT2063_REG_LNA_TGT] & (u8) ~0x80) |

		      (RFOVDIS[Mode] ? 0x80 : 0x00);

		if (state->reg[MT2063_REG_LNA_TGT] != val)

			status |= mt2063_setreg(state, MT2063_REG_LNA_TGT, val);

	}

	}



	/* Ignore FIF Overload */

	if (status >= 0) {

		val =

		    (state->

		     reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x80) |

		val = (state->reg[MT2063_REG_PD1_TGT] & (u8) ~0x80) |

		      (FIFOVDIS[Mode] ? 0x80 : 0x00);

		if (state->reg[MT2063_REG_PD1_TGT] != val) {

		if (state->reg[MT2063_REG_PD1_TGT] != val)

			status |= mt2063_setreg(state, MT2063_REG_PD1_TGT, val);

	}

	}



	if (status >= 0)

		state->rcvr_mode = Mode;



	return (status);

	return status;

}



/****************************************************************************
@@ -1473,7 +1441,7 @@ static u32 MT2063_ClearPowerMaskBits(struct mt2063_state *state, 
				    &state->reg[MT2063_REG_PWR_1], 1);

	}



	return (status);

	return status;

}



/****************************************************************************
@@ -1580,7 +1548,7 @@ static u32 MT2063_fLO_FractionalTerm(u32 f_ref, u32 num, u32 denom) 
	u32 loss = t1 % denom;

	u32 term2 =

	    (((f_ref & 0x00003FFF) * num + (loss << 14)) + (denom / 2)) / denom;

	return ((term1 << 14) + term2);

	return (term1 << 14) + term2;

}



/****************************************************************************
@@ -2039,7 +2007,6 @@ int mt2063_setTune(struct dvb_frontend *fe, u32 f_in, u32 bw_in, 
			pict2snd1 = 0;

			pict2snd2 = 0;

			rcvr_mode = 4;

			//f_in -= 2900000;

			break;

		}

	case MTTUNEA_DVBC:{
@@ -2053,7 +2020,7 @@ int mt2063_setTune(struct dvb_frontend *fe, u32 f_in, u32 bw_in, 
		}

	case MTTUNEA_DVBT:{

			pict_car = 36125000;

			ch_bw = bw_in;	//8000000

			ch_bw = bw_in;

			pict2chanb_vsb = -(ch_bw / 2);

			pict2snd1 = 0;

			pict2snd2 = 0;
@@ -2349,14 +2316,14 @@ static int mt2063_get_state(struct dvb_frontend *fe, 


	switch (param) {

	case DVBFE_TUNER_FREQUENCY:

		//get frequency

		/* get frequency */

		break;

	case DVBFE_TUNER_TUNERSTEP:

		break;

	case DVBFE_TUNER_IFFREQ:

		break;

	case DVBFE_TUNER_BANDWIDTH:

		//get bandwidth

		/* get bandwidth */

		break;

	case DVBFE_TUNER_REFCLOCK:

		tunstate->refclock = mt2063_lockStatus(state);
@@ -2376,7 +2343,7 @@ static int mt2063_set_state(struct dvb_frontend *fe, 


	switch (param) {

	case DVBFE_TUNER_FREQUENCY:

		//set frequency

		/* set frequency */



		status =

		    mt2063_setTune(fe,
@@ -2390,7 +2357,7 @@ static int mt2063_set_state(struct dvb_frontend *fe, 
	case DVBFE_TUNER_IFFREQ:

		break;

	case DVBFE_TUNER_BANDWIDTH:

		//set bandwidth

		/* set bandwidth */

		state->bandwidth = tunstate->bandwidth;

		break;

	case DVBFE_TUNER_REFCLOCK:
@@ -2446,7 +2413,7 @@ struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe, 
	fe->tuner_priv = state;

	fe->ops.tuner_ops = mt2063_ops;



	printk("%s: Attaching MT2063 \n", __func__);

	printk(KERN_INFO "%s: Attaching MT2063\n", __func__);

	return fe;



error: