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Commit 6f546bc3 authored by Graf Yang's avatar Graf Yang Committed by Mike Frysinger
Browse files

Blackfin: SMP: implement cpu_freq support 



Re-use some of the existing cpu hotplugging code in the process.

Signed-off-by: default avatarGraf Yang <graf.yang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 820b127d

arch/blackfin/include/asm/dpmc.h

+3 −0
Original line number Diff line number Diff line
@@ -125,6 +125,9 @@ void unset_dram_srfs(void); 


#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))



#ifdef CONFIG_CPU_FREQ

#define CPUFREQ_CPU 0

#endif

struct bfin_dpmc_platform_data {

	const unsigned int *tuple_tab;

	unsigned short tabsize;

arch/blackfin/include/asm/smp.h

+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ extern unsigned long dcache_invld_count[NR_CPUS]; 
void smp_icache_flush_range_others(unsigned long start,

				   unsigned long end);

#ifdef CONFIG_HOTPLUG_CPU

void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);

void coreb_die(void);

void cpu_die(void);

void platform_cpu_die(void);

int __cpu_disable(void);

arch/blackfin/mach-bf561/hotplug.c

+9 −12
Original line number Diff line number Diff line
@@ -5,30 +5,27 @@ 
 * Licensed under the GPL-2 or later.

 */



#include <linux/smp.h>

#include <asm/blackfin.h>

#include <asm/irq.h>

#include <asm/smp.h>



#define SIC_SYSIRQ(irq)	(irq - (IRQ_CORETMR + 1))

#include <mach/pll.h>



int hotplug_coreb;



void platform_cpu_die(void)

{

	unsigned long iwr[2] = {0, 0};

	unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32;

	unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32);



	unsigned long iwr;

	hotplug_coreb = 1;



	iwr[bank] = bit;



	/* disable core timer */

	bfin_write_TCNTL(0);



	/* clear ipi interrupt IRQ_SUPPLE_0 */

	/* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */

	bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));

	SSYNC();



	coreb_sleep(iwr[0], iwr[1], 0);

	/* set CoreB wakeup by ipi0, iwr will be discarded */

	bfin_iwr_set_sup0(&iwr, &iwr, &iwr);

	SSYNC();



	coreb_die();

}

arch/blackfin/mach-bf561/secondary.S

+9 −17
Original line number Diff line number Diff line
@@ -162,39 +162,31 @@ ENTRY(_coreb_trampoline_start) 
ENDPROC(_coreb_trampoline_start)

ENTRY(_coreb_trampoline_end)



#ifdef CONFIG_HOTPLUG_CPU

.section ".text"

ENTRY(_set_sicb_iwr)

	P0.H = hi(SICB_IWR0);

	P0.L = lo(SICB_IWR0);

	P1.H = hi(SICB_IWR1);

	P1.L = lo(SICB_IWR1);

	[P0] = R0;

	[P1] = R1;

	SSYNC;

	RTS;

ENDPROC(_set_sicb_iwr)



ENTRY(_coreb_sleep)

ENTRY(_coreb_die)

	sp.l = lo(INITIAL_STACK);

	sp.h = hi(INITIAL_STACK);

	fp = sp;

	usp = sp;



	call _set_sicb_iwr;



	CLI R2;

	SSYNC;

	IDLE;

	STI R2;



	R0 = IWR_DISABLE_ALL;

	R1 = IWR_DISABLE_ALL;

	call _set_sicb_iwr;

	P0.H = hi(SYSMMR_BASE);

	P0.L = lo(SYSMMR_BASE);

	[P0 + (SICB_IWR0 - SYSMMR_BASE)] = R0;

	[P0 + (SICB_IWR1 - SYSMMR_BASE)] = R0;

	SSYNC;



	p0.h = hi(COREB_L1_CODE_START);

	p0.l = lo(COREB_L1_CODE_START);

	jump (p0);

ENDPROC(_coreb_sleep)

ENDPROC(_coreb_die)

#endif



__INIT

ENTRY(_coreb_start)

arch/blackfin/mach-common/cpufreq.c

+0 −2
Original line number Diff line number Diff line
@@ -16,8 +16,6 @@ 
#include <asm/time.h>

#include <asm/dpmc.h>



#define CPUFREQ_CPU 0



/* this is the table of CCLK frequencies, in Hz */

/* .index is the entry in the auxillary dpm_state_table[] */

static struct cpufreq_frequency_table bfin_freq_table[] = {