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Commit 6f09359a authored by Florian Fainelli's avatar Florian Fainelli Committed by Herbert Xu
Browse files

hwrng: bcm2835 - Add Broadcom MIPS I/O accessors 



Broadcom MIPS HW is always strapped to match the system-wide endian such
that all I/O access to this RNG block is done with the native CPU
endian, account for that.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent abd42026

drivers/char/hw_random/bcm2835-rng.c

+11 −2
Original line number Diff line number Diff line
@@ -44,12 +44,21 @@ static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng) 


static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset)

{

	/* MIPS chips strapped for BE will automagically configure the

	 * peripheral registers for CPU-native byte order.

	 */

	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))

		return __raw_readl(priv->base + offset);

	else

		return readl(priv->base + offset);

}



static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val,

			      u32 offset)

{

	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))

		__raw_writel(val, priv->base + offset);

	else

		writel(val, priv->base + offset);

}