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Unverified Commit 6e554074 authored by Akshu Agrawal's avatar Akshu Agrawal Committed by Mark Brown
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ASoC: AMD: Fix clocks in CZ DA7219 machine driver 



System clock on the platform is 25Mhz and not 24Mhz.

PLL_OUT for da7219 codec to use DA7219_PLL_FREQ_OUT_98304
as it is for 48KHz SR.

Signed-off-by: default avatarAkshu Agrawal <akshu.agrawal@amd.com>
Signed-off-by: default avatarVijendar Mukunda <Vijendar.Mukunda@amd.com>
Reviewed-by: default avatarDaniel Kurtz <djkurtz@chromium.org>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent e9716ff3

sound/soc/amd/acp-da7219-max98357a.c

+2 −3
Original line number Diff line number Diff line
@@ -39,8 +39,7 @@ 
#include "../codecs/da7219.h"

#include "../codecs/da7219-aad.h"



#define CZ_PLAT_CLK 24000000

#define MCLK_RATE 24576000

#define CZ_PLAT_CLK 25000000

#define DUAL_CHANNEL		2



static struct snd_soc_jack cz_jack;
@@ -63,7 +62,7 @@ static int cz_da7219_init(struct snd_soc_pcm_runtime *rtd) 
	}



	ret = snd_soc_dai_set_pll(codec_dai, 0, DA7219_SYSCLK_PLL,

				  CZ_PLAT_CLK, MCLK_RATE);

				  CZ_PLAT_CLK, DA7219_PLL_FREQ_OUT_98304);

	if (ret < 0) {

		dev_err(rtd->dev, "can't set codec pll: %d\n", ret);

		return ret;