Loading Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt +19 −0 Original line number Diff line number Diff line Loading @@ -14,3 +14,22 @@ following property before the previous one: Example: compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710"; Power management ---------------- For power management (particularly DVFS and AVS), the North Bridge Power Management component is needed: Required properties: - compatible : should contain "marvell,armada-3700-nb-pm", "syscon"; - reg : the register start and length for the North Bridge Power Management Example: nb_pm: syscon@14000 { compatible = "marvell,armada-3700-nb-pm", "syscon"; reg = <0x14000 0x60>; } Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt 0 → 100644 +63 −0 Original line number Diff line number Diff line Texas Instruments OMAP compatible OPP supply description OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which contain data that can be used to adjust voltages programmed for some of their supplies for more efficient operation. This binding provides the information needed to read these values and use them to program the main regulator during an OPP transitions. Also, some supplies may have an associated vbb-supply which is an Adaptive Body Bias regulator which much be transitioned in a specific sequence with regards to the vdd-supply and clk when making an OPP transition. By supplying two regulators to the device that will undergo OPP transitions we can make use of the multi regulator binding that is part of the OPP core described here [1] to describe both regulators needed by the platform. [1] Documentation/devicetree/bindings/opp/opp.txt Required Properties for Device Node: - vdd-supply: phandle to regulator controlling VDD supply - vbb-supply: phandle to regulator controlling Body Bias supply (Usually Adaptive Body Bias regulator) Required Properties for opp-supply node: - compatible: Should be one of: "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD along with VBB "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD but no VBB. - reg: Address and length of the efuse register set for the device (mandatory only for "ti,omap5-opp-supply") - ti,efuse-settings: An array of u32 tuple items providing information about optimized efuse configuration. Each item consists of the following: volt: voltage in uV - reference voltage (OPP voltage) efuse_offseet: efuse offset from reg where the optimized voltage is stored. - ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply. Example: /* Device Node (CPU) */ cpus { cpu0: cpu@0 { device_type = "cpu"; ... vdd-supply = <&vcc>; vbb-supply = <&abb_mpu>; }; }; /* OMAP OPP Supply with Class0 registers */ opp_supply_mpu: opp_supply@4a003b20 { compatible = "ti,omap5-opp-supply"; reg = <0x4a003b20 0x8>; ti,efuse-settings = < /* uV offset */ 1060000 0x0 1160000 0x4 1210000 0x8 >; ti,absolute-max-voltage-uv = <1500000>; }; MAINTAINERS +1 −0 Original line number Diff line number Diff line Loading @@ -1583,6 +1583,7 @@ F: arch/arm/boot/dts/kirkwood* F: arch/arm/configs/mvebu_*_defconfig F: arch/arm/mach-mvebu/ F: arch/arm64/boot/dts/marvell/armada* F: drivers/cpufreq/armada-37xx-cpufreq.c F: drivers/cpufreq/mvebu-cpufreq.c F: drivers/irqchip/irq-armada-370-xp.c F: drivers/irqchip/irq-mvebu-* Loading drivers/cpufreq/Kconfig.arm +47 −41 Original line number Diff line number Diff line Loading @@ -2,6 +2,29 @@ # ARM CPU Frequency scaling drivers # config ACPI_CPPC_CPUFREQ tristate "CPUFreq driver based on the ACPI CPPC spec" depends on ACPI_PROCESSOR select ACPI_CPPC_LIB help This adds a CPUFreq driver which uses CPPC methods as described in the ACPIv5.1 spec. CPPC stands for Collaborative Processor Performance Controls. It is based on an abstract continuous scale of CPU performance values which allows the remote power processor to flexibly optimize for power and performance. CPPC relies on power management firmware support for its operation. If in doubt, say N. config ARM_ARMADA_37XX_CPUFREQ tristate "Armada 37xx CPUFreq support" depends on ARCH_MVEBU help This adds the CPUFreq driver support for Marvell Armada 37xx SoCs. The Armada 37xx PMU supports 4 frequency and VDD levels. # big LITTLE core layer and glue drivers config ARM_BIG_LITTLE_CPUFREQ tristate "Generic ARM big LITTLE CPUfreq driver" Loading @@ -12,6 +35,30 @@ config ARM_BIG_LITTLE_CPUFREQ help This enables the Generic CPUfreq driver for ARM big.LITTLE platforms. config ARM_DT_BL_CPUFREQ tristate "Generic probing via DT for ARM big LITTLE CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && OF help This enables probing via DT for Generic CPUfreq driver for ARM big.LITTLE platform. This gets frequency tables from DT. config ARM_SCPI_CPUFREQ tristate "SCPI based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARM_SCPI_PROTOCOL && COMMON_CLK_SCPI help This adds the CPUfreq driver support for ARM big.LITTLE platforms using SCPI protocol for CPU power management. This driver uses SCPI Message Protocol driver to interact with the firmware providing the CPU DVFS functionality. config ARM_VEXPRESS_SPC_CPUFREQ tristate "Versatile Express SPC based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARCH_VEXPRESS_SPC help This add the CPUfreq driver support for Versatile Express big.LITTLE platforms using SPC for power management. config ARM_BRCMSTB_AVS_CPUFREQ tristate "Broadcom STB AVS CPUfreq driver" depends on ARCH_BRCMSTB || COMPILE_TEST Loading @@ -33,20 +80,6 @@ config ARM_BRCMSTB_AVS_CPUFREQ_DEBUG If in doubt, say N. config ARM_DT_BL_CPUFREQ tristate "Generic probing via DT for ARM big LITTLE CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && OF help This enables probing via DT for Generic CPUfreq driver for ARM big.LITTLE platform. This gets frequency tables from DT. config ARM_VEXPRESS_SPC_CPUFREQ tristate "Versatile Express SPC based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARCH_VEXPRESS_SPC help This add the CPUfreq driver support for Versatile Express big.LITTLE platforms using SPC for power management. config ARM_EXYNOS5440_CPUFREQ tristate "SAMSUNG EXYNOS5440" depends on SOC_EXYNOS5440 Loading Loading @@ -205,16 +238,6 @@ config ARM_SA1100_CPUFREQ config ARM_SA1110_CPUFREQ bool config ARM_SCPI_CPUFREQ tristate "SCPI based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARM_SCPI_PROTOCOL && COMMON_CLK_SCPI help This adds the CPUfreq driver support for ARM big.LITTLE platforms using SCPI protocol for CPU power management. This driver uses SCPI Message Protocol driver to interact with the firmware providing the CPU DVFS functionality. config ARM_SPEAR_CPUFREQ bool "SPEAr CPUFreq support" depends on PLAT_SPEAR Loading Loading @@ -275,20 +298,3 @@ config ARM_PXA2xx_CPUFREQ This add the CPUFreq driver support for Intel PXA2xx SOCs. If in doubt, say N. config ACPI_CPPC_CPUFREQ tristate "CPUFreq driver based on the ACPI CPPC spec" depends on ACPI_PROCESSOR select ACPI_CPPC_LIB default n help This adds a CPUFreq driver which uses CPPC methods as described in the ACPIv5.1 spec. CPPC stands for Collaborative Processor Performance Controls. It is based on an abstract continuous scale of CPU performance values which allows the remote power processor to flexibly optimize for power and performance. CPPC relies on power management firmware support for its operation. If in doubt, say N. drivers/cpufreq/Makefile +5 −4 Original line number Diff line number Diff line Loading @@ -52,23 +52,26 @@ obj-$(CONFIG_ARM_BIG_LITTLE_CPUFREQ) += arm_big_little.o # LITTLE drivers, so that it is probed last. obj-$(CONFIG_ARM_DT_BL_CPUFREQ) += arm_big_little_dt.o obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ) += armada-37xx-cpufreq.o obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ) += mediatek-cpufreq.o obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cpufreq.o obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o obj-$(CONFIG_ARM_S3C2440_CPUFREQ) += s3c2440-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o Loading @@ -81,8 +84,6 @@ obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o obj-$(CONFIG_ARM_TI_CPUFREQ) += ti-cpufreq.o obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cpufreq.o ################################################################################## Loading Loading
Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt +19 −0 Original line number Diff line number Diff line Loading @@ -14,3 +14,22 @@ following property before the previous one: Example: compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710"; Power management ---------------- For power management (particularly DVFS and AVS), the North Bridge Power Management component is needed: Required properties: - compatible : should contain "marvell,armada-3700-nb-pm", "syscon"; - reg : the register start and length for the North Bridge Power Management Example: nb_pm: syscon@14000 { compatible = "marvell,armada-3700-nb-pm", "syscon"; reg = <0x14000 0x60>; }
Documentation/devicetree/bindings/opp/ti-omap5-opp-supply.txt 0 → 100644 +63 −0 Original line number Diff line number Diff line Texas Instruments OMAP compatible OPP supply description OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which contain data that can be used to adjust voltages programmed for some of their supplies for more efficient operation. This binding provides the information needed to read these values and use them to program the main regulator during an OPP transitions. Also, some supplies may have an associated vbb-supply which is an Adaptive Body Bias regulator which much be transitioned in a specific sequence with regards to the vdd-supply and clk when making an OPP transition. By supplying two regulators to the device that will undergo OPP transitions we can make use of the multi regulator binding that is part of the OPP core described here [1] to describe both regulators needed by the platform. [1] Documentation/devicetree/bindings/opp/opp.txt Required Properties for Device Node: - vdd-supply: phandle to regulator controlling VDD supply - vbb-supply: phandle to regulator controlling Body Bias supply (Usually Adaptive Body Bias regulator) Required Properties for opp-supply node: - compatible: Should be one of: "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD along with VBB "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD but no VBB. - reg: Address and length of the efuse register set for the device (mandatory only for "ti,omap5-opp-supply") - ti,efuse-settings: An array of u32 tuple items providing information about optimized efuse configuration. Each item consists of the following: volt: voltage in uV - reference voltage (OPP voltage) efuse_offseet: efuse offset from reg where the optimized voltage is stored. - ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply. Example: /* Device Node (CPU) */ cpus { cpu0: cpu@0 { device_type = "cpu"; ... vdd-supply = <&vcc>; vbb-supply = <&abb_mpu>; }; }; /* OMAP OPP Supply with Class0 registers */ opp_supply_mpu: opp_supply@4a003b20 { compatible = "ti,omap5-opp-supply"; reg = <0x4a003b20 0x8>; ti,efuse-settings = < /* uV offset */ 1060000 0x0 1160000 0x4 1210000 0x8 >; ti,absolute-max-voltage-uv = <1500000>; };
MAINTAINERS +1 −0 Original line number Diff line number Diff line Loading @@ -1583,6 +1583,7 @@ F: arch/arm/boot/dts/kirkwood* F: arch/arm/configs/mvebu_*_defconfig F: arch/arm/mach-mvebu/ F: arch/arm64/boot/dts/marvell/armada* F: drivers/cpufreq/armada-37xx-cpufreq.c F: drivers/cpufreq/mvebu-cpufreq.c F: drivers/irqchip/irq-armada-370-xp.c F: drivers/irqchip/irq-mvebu-* Loading
drivers/cpufreq/Kconfig.arm +47 −41 Original line number Diff line number Diff line Loading @@ -2,6 +2,29 @@ # ARM CPU Frequency scaling drivers # config ACPI_CPPC_CPUFREQ tristate "CPUFreq driver based on the ACPI CPPC spec" depends on ACPI_PROCESSOR select ACPI_CPPC_LIB help This adds a CPUFreq driver which uses CPPC methods as described in the ACPIv5.1 spec. CPPC stands for Collaborative Processor Performance Controls. It is based on an abstract continuous scale of CPU performance values which allows the remote power processor to flexibly optimize for power and performance. CPPC relies on power management firmware support for its operation. If in doubt, say N. config ARM_ARMADA_37XX_CPUFREQ tristate "Armada 37xx CPUFreq support" depends on ARCH_MVEBU help This adds the CPUFreq driver support for Marvell Armada 37xx SoCs. The Armada 37xx PMU supports 4 frequency and VDD levels. # big LITTLE core layer and glue drivers config ARM_BIG_LITTLE_CPUFREQ tristate "Generic ARM big LITTLE CPUfreq driver" Loading @@ -12,6 +35,30 @@ config ARM_BIG_LITTLE_CPUFREQ help This enables the Generic CPUfreq driver for ARM big.LITTLE platforms. config ARM_DT_BL_CPUFREQ tristate "Generic probing via DT for ARM big LITTLE CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && OF help This enables probing via DT for Generic CPUfreq driver for ARM big.LITTLE platform. This gets frequency tables from DT. config ARM_SCPI_CPUFREQ tristate "SCPI based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARM_SCPI_PROTOCOL && COMMON_CLK_SCPI help This adds the CPUfreq driver support for ARM big.LITTLE platforms using SCPI protocol for CPU power management. This driver uses SCPI Message Protocol driver to interact with the firmware providing the CPU DVFS functionality. config ARM_VEXPRESS_SPC_CPUFREQ tristate "Versatile Express SPC based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARCH_VEXPRESS_SPC help This add the CPUfreq driver support for Versatile Express big.LITTLE platforms using SPC for power management. config ARM_BRCMSTB_AVS_CPUFREQ tristate "Broadcom STB AVS CPUfreq driver" depends on ARCH_BRCMSTB || COMPILE_TEST Loading @@ -33,20 +80,6 @@ config ARM_BRCMSTB_AVS_CPUFREQ_DEBUG If in doubt, say N. config ARM_DT_BL_CPUFREQ tristate "Generic probing via DT for ARM big LITTLE CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && OF help This enables probing via DT for Generic CPUfreq driver for ARM big.LITTLE platform. This gets frequency tables from DT. config ARM_VEXPRESS_SPC_CPUFREQ tristate "Versatile Express SPC based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARCH_VEXPRESS_SPC help This add the CPUfreq driver support for Versatile Express big.LITTLE platforms using SPC for power management. config ARM_EXYNOS5440_CPUFREQ tristate "SAMSUNG EXYNOS5440" depends on SOC_EXYNOS5440 Loading Loading @@ -205,16 +238,6 @@ config ARM_SA1100_CPUFREQ config ARM_SA1110_CPUFREQ bool config ARM_SCPI_CPUFREQ tristate "SCPI based CPUfreq driver" depends on ARM_BIG_LITTLE_CPUFREQ && ARM_SCPI_PROTOCOL && COMMON_CLK_SCPI help This adds the CPUfreq driver support for ARM big.LITTLE platforms using SCPI protocol for CPU power management. This driver uses SCPI Message Protocol driver to interact with the firmware providing the CPU DVFS functionality. config ARM_SPEAR_CPUFREQ bool "SPEAr CPUFreq support" depends on PLAT_SPEAR Loading Loading @@ -275,20 +298,3 @@ config ARM_PXA2xx_CPUFREQ This add the CPUFreq driver support for Intel PXA2xx SOCs. If in doubt, say N. config ACPI_CPPC_CPUFREQ tristate "CPUFreq driver based on the ACPI CPPC spec" depends on ACPI_PROCESSOR select ACPI_CPPC_LIB default n help This adds a CPUFreq driver which uses CPPC methods as described in the ACPIv5.1 spec. CPPC stands for Collaborative Processor Performance Controls. It is based on an abstract continuous scale of CPU performance values which allows the remote power processor to flexibly optimize for power and performance. CPPC relies on power management firmware support for its operation. If in doubt, say N.
drivers/cpufreq/Makefile +5 −4 Original line number Diff line number Diff line Loading @@ -52,23 +52,26 @@ obj-$(CONFIG_ARM_BIG_LITTLE_CPUFREQ) += arm_big_little.o # LITTLE drivers, so that it is probed last. obj-$(CONFIG_ARM_DT_BL_CPUFREQ) += arm_big_little_dt.o obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ) += armada-37xx-cpufreq.o obj-$(CONFIG_ARM_BRCMSTB_AVS_CPUFREQ) += brcmstb-avs-cpufreq.o obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o obj-$(CONFIG_ARCH_DAVINCI) += davinci-cpufreq.o obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o obj-$(CONFIG_ARM_MEDIATEK_CPUFREQ) += mediatek-cpufreq.o obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cpufreq.o obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o obj-$(CONFIG_ARM_S3C2440_CPUFREQ) += s3c2440-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o obj-$(CONFIG_ARM_SA1100_CPUFREQ) += sa1100-cpufreq.o obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o Loading @@ -81,8 +84,6 @@ obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o obj-$(CONFIG_ARM_TI_CPUFREQ) += ti-cpufreq.o obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o obj-$(CONFIG_ACPI_CPPC_CPUFREQ) += cppc_cpufreq.o obj-$(CONFIG_MACH_MVEBU_V7) += mvebu-cpufreq.o ################################################################################## Loading
