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Commit 65afdf45 authored by Georgi Djakov's avatar Georgi Djakov Committed by Andy Gross
Browse files

arm64: dts: qcom: msm8916: Add CPU frequency scaling support 



Add a CPU OPP table to allow CPU frequency scaling on msm8916 platforms.

Signed-off-by: default avatarGeorgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Tested-by: default avatarAmit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 025b995f

arch/arm64/boot/dts/qcom/msm8916.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -113,6 +113,8 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

		};



		CPU1: cpu@1 {
@@ -122,6 +124,8 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

		};



		CPU2: cpu@2 {
@@ -131,6 +135,8 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

		};



		CPU3: cpu@3 {
@@ -140,6 +146,8 @@ 
			next-level-cache = <&L2_0>;

			enable-method = "psci";

			cpu-idle-states = <&CPU_SPC>;

			clocks = <&apcs 0>;

			operating-points-v2 = <&cpu_opp_table>;

		};



		L2_0: l2-cache {
@@ -212,6 +220,24 @@ 


	};



	cpu_opp_table: cpu_opp_table {

		compatible = "operating-points-v2";

		opp-shared;



		opp-200000000 {

			opp-hz = /bits/ 64 <200000000>;

		};

		opp-400000000 {

			opp-hz = /bits/ 64 <400000000>;

		};

		opp-800000000 {

			opp-hz = /bits/ 64 <800000000>;

		};

		opp-998400000 {

			opp-hz = /bits/ 64 <998400000>;

		};

	};



	gpu_opp_table: opp_table {

		compatible = "operating-points-v2";