Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 65425265 authored by Stefan Agner's avatar Stefan Agner Committed by Shawn Guo
Browse files

ARM: dts: vf-colibri: enable NAND flash controller 



Enable NAND access by adding pinmux and NAND flash controller node
to device tree. The NAND chips currently used on the Colibri VF61
requires 8-bit ECC per 512 byte page, hence specify 32-bit ECC
strength per 2k page size.

Reviewed-by: default avatarBrian Norris <computersforpeace@gmail.com>
Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent baeeb541

arch/arm/boot/dts/vf-colibri.dtsi

+39 −0
Original line number Diff line number Diff line
@@ -52,6 +52,26 @@ 
	pinctrl-0 = <&pinctrl_i2c0>;

};



&nfc {

	assigned-clocks = <&clks VF610_CLK_NFC>;

	assigned-clock-rates = <33000000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_nfc>;

	status = "okay";



	nand@0 {

		compatible = "fsl,vf610-nfc-nandcs";

		reg = <0>;

		#address-cells = <1>;

		#size-cells = <1>;

		nand-bus-width = <8>;

		nand-ecc-mode = "hw";

		nand-ecc-strength = <32>;

		nand-ecc-step-size = <2048>;

		nand-on-flash-bbt;

	};

};



&pwm0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm0>;
@@ -156,6 +176,25 @@ 
			>;

		};



		pinctrl_nfc: nfcgrp {

			fsl,pins = <

				VF610_PAD_PTD23__NF_IO7		0x28df

				VF610_PAD_PTD22__NF_IO6		0x28df

				VF610_PAD_PTD21__NF_IO5		0x28df

				VF610_PAD_PTD20__NF_IO4		0x28df

				VF610_PAD_PTD19__NF_IO3		0x28df

				VF610_PAD_PTD18__NF_IO2		0x28df

				VF610_PAD_PTD17__NF_IO1		0x28df

				VF610_PAD_PTD16__NF_IO0		0x28df

				VF610_PAD_PTB24__NF_WE_B	0x28c2

				VF610_PAD_PTB25__NF_CE0_B	0x28c2

				VF610_PAD_PTB27__NF_RE_B	0x28c2

				VF610_PAD_PTC26__NF_RB_B	0x283d

				VF610_PAD_PTC27__NF_ALE		0x28c2

				VF610_PAD_PTC28__NF_CLE		0x28c2

			>;

		};



		pinctrl_pwm0: pwm0grp {

			fsl,pins = <

				VF610_PAD_PTB0__FTM0_CH0		0x1182